IP Library Granted Patent US 7,968,942
Granted Patent B2
US 7,968,942 · App. 12/260,562 · Granted Jun 28, 2011

Semiconductor apparatus

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Quick Facts
Patent No.
US 7,968,942
App. No.
12/260,562
Granted
Jun 28, 2011
Kind
B2
Abstract

The present invention provides a semiconductor apparatus having high reliability with respect to a withstand voltage, leakage characteristics, etc. by disposing a structure of preventing stress occurring by metal wiring from directly acting on a trench relating to the semiconductor apparatus having a trench gate. The semiconductor apparatus of the invention includes a semiconductor substrate including a semiconductor layer having a predetermined impurity concentration, a trench gate formed in the semiconductor layer by filling a stripe-shaped trench by a conductor layer on which surface and interface a gate oxide film is formed, an insulating film covering a surface of the semiconductor layer and having a source contact opening, a source region formed in the semiconductor layer, a source electrode formed on the surface of the semiconductor layer so as to electrically connect to the source region through the source contact opening, a gate peripheral wiring connected to the trench gate at a peripheral edge part of the trench gate, a gate electrode separately formed from the source electrode, formed above the surface of the semiconductor layer and connected to the gate peripheral wiring and a drain electrode formed on an surface of the semiconductor substrate opposite to the surface of the semiconductor layer, wherein the trench gate is formed so as to avoid a corner portion of the source contact opening of the source electrode.

Claims (40)

1. A semiconductor apparatus comprising:

a semiconductor substrate including a semiconductor layer having a predetermined impurity concentration;

a plurality of trench gates each formed in the semiconductor layer, and having a stripe-shaped trench filled with a conductor layer and a gate oxide film;

a gate peripheral wiring connected to ends of the plurality of trench gates;

a protective film covering a surface of the semiconductor layer and the gate peripheral wiring, and having a source contact opening;

a source region formed in the semiconductor layer;

a source electrode formed in the source contact opening so as to electrically connect to the source region through the source contact opening;

an insulating film covering the conductor layer; and

a drain electrode formed on a back surface of the semiconductor substrate opposite to the surface of the semiconductor layer,

wherein no corner portion of the source contact opening is disposed on the plurality of trench gates.

2. The semiconductor apparatus according to claim 1 , wherein edges of the trench gates around the corner portion of the source contact opening are formed along a corner shape of the corner portion of the source contact opening.

3. The semiconductor apparatus according to claim 2 , wherein the edges of the trench gates around the corner portion are distant from the corner portion in more than 1 μm.

4. The semiconductor apparatus according to claim 1 , further comprising:

a gate electrode separately formed from the source electrode, formed above the surface of the semiconductor layer and connected to the gate peripheral wiring.

5. A semiconductor apparatus comprising:

a semiconductor substrate including a semiconductor layer having a predetermined impurity concentration;

a plurality of trench gates each formed in the semiconductor layer, and having a stripe-shaped trench filled with a conductor layer and a gate oxide film;

a protective film covering a surface of the semiconductor layer and having a source contact opening;

a source electrode formed at the source contact opening;

a gate peripheral wiring connected to ends of the plurality of trench gates;

a drain electrode formed on a back surface of the semiconductor substrate opposite to the surface of the semiconductor layer,

wherein some of the plurality of trench gates are formed so that ends of the some of the plurality of trench gates are distant from a corner portion of the source contact opening in an equal distance, and adjoining ends of the some of the plurality of trench gates are electrically connected.

6. The semiconductor apparatus according to claim 5 , further comprising:

a gate electrode separately formed from the source electrode, formed above the surface of the semiconductor layer and connected to the gate peripheral wiring.

7. A semiconductor apparatus comprising:

a semiconductor substrate including a semiconductor layer having a predetermined impurity concentration;

a plurality of trench gates each formed in the semiconductor layer, and having a stripe-shaped trench filled with a conductor layer and a gate oxide film;

a gate peripheral wiring connected to ends of the plurality of trench gates;

a protective film covering a surface of the semiconductor layer and the gate peripheral wiring, and having a source contact opening;

a source region formed in the semiconductor layer;

a source electrode formed in the source contact opening so as to electrically connect to the source region through the source contact opening;

an insulating film covering the conductor layer;

a drain electrode formed on a back surface of the semiconductor substrate surface opposite to the surface of the semiconductor layer; and

connection trenches electrically connecting adjoining trench gates at ends of the plurality of trench gates,

wherein the source region is formed so as to contact the plurality of trench gates and not to contact the connection trenches, and so as to have a predetermined depth at both ends of the source region.

8. The semiconductor apparatus according to claim 7 , further comprising:

a gate electrode separately formed from the source electrode, formed above the surface of the semiconductor layer and connected to the gate peripheral wiring.

9. The semiconductor apparatus according to claim 7 , wherein no corner portion of the source contact opening is disposed on the plurality of trench gates.

10. The semiconductor apparatus according to claim 9 , wherein edged of the plurality of trench gates around the corner portion of the source contact opening are formed along a corner shape of the corner portion of the source contact opening

wherein edges of the trench gates around the corner portion of the source contact opening are formed along a corner shape of the corner portion of the source contact opening.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2020
From: PANASONIC CORPORATION
To: PANASONIC SEMICONDUCTOR SOLUTIONS CO., LTD.
Reel/Frame 052755/0917 →