IP Library Granted Patent US 7,777,170
Granted Patent B2
US 7,777,170 · App. 12/261,393 · Granted Aug 17, 2010

Solid-state imaging device and camera

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Quick Facts
Patent No.
US 7,777,170
App. No.
12/261,393
Granted
Aug 17, 2010
Kind
B2
Abstract

A solid-state imaging device comprises a pixel array; a reference signal generation unit operable to generate a reference signal that changes monotonically for a predetermined period in a horizontal period; a comparator operable to compare the level of a pixel signal with the level of a reference signal; a counter operable to count input clock pulses; a memory operable to store the number of counts counted by the counter as a digital value; and a timing control unit operable to generate a clock that is to be input into the counter, and change frequency of the clock that is to be input into the counter based on external input data.

Claims (39)

1. A solid-state imaging device comprising:

a pixel array in which a plurality of pixels are arranged in rows and columns;

a reference signal generation unit operable to generate a reference signal for each of horizontal periods, the reference signal changing monotonically for a predetermined period included in each of the horizontal periods;

comparators that are arranged in one-to-one correspondence with the columns of the pixel array, each of the comparators being operable to compare, for each pixel in a corresponding column, (i) a level of a pixel signal output from a pixel in the corresponding column with (ii) a level of the reference signal;

a counter operable to count input clock pulses; and

a clock control unit operable to generate a clock that is to be input into the counter, and change frequency of the clock based on external input data, wherein

the external input data indicates a brightness of a scene derived from a level of each of the pixel signals that have been output from the pixels, and

the clock control unit changes the frequency of the clock in a manner that the brighter the brightness of the scene is, the lower the frequency of the clock is.

2. The solid-state imaging device of claim 1 , wherein

the clock control unit further operable to change a length of a period for inputting the clock into the counter, and change the period in a manner that the higher the frequency of the clock is, the shorter the period is.

3. The solid-state imaging device of claim 2 , wherein

each of the plurality of pixels includes an amplification unit for amplifying a signal level, and

the solid-state imaging device further comprising

a current suppression unit operable to one of suppress and stop current flowing in either the amplification units or the comparators, from elapse of the period for inputting the clock into the counter to arrival of a next period for inputting the clock into the counter.

4. The solid-state imaging device of claim 1 , further comprising

a current suppression unit operable to suppress current flowing in the comparator when the frequency of the clock is lower than a predetermined value.

5. The solid-state imaging device of claim 1 , wherein

the reference signal generation unit changes a rate of the temporal change of the reference signal, in accordance with the brightness of the scene.

6. The solid-state imaging device of claim 5 , wherein

the reference signal generation unit changes the rate of the temporal change of the reference signal, in a manner that the brighter the brightness of the scene is, the higher the rate of the temporal change of the reference signal is.

7. The solid-state imaging device of claim 6 , wherein

the clock control unit further operable to change a length of a period for inputting the clock into the counter, and change the period in a manner that the higher the frequency of the clock is, the shorter the period is.

8. The solid-state imaging device of claim 7 , wherein

each of the plurality of pixels includes an amplification unit for amplifying a signal level, and

the solid-state imaging device further comprising

a current suppression unit operable to one of suppress and stop current flowing in either the amplification units or the comparators, from elapse of the period for inputting the clock into the counter to arrival of a next period for inputting the clock into the counter.

9. The solid-state imaging device of claim 1 , wherein

the clock control unit changes the frequency of the generated clock by a unit of frame to be captured.

10. The solid-state imaging device of claim 1 , wherein

the reference signal generation unit generates the reference signal in synchronization with a reference clock having a predetermined frequency, so that the reference signal changes in stages over time, and

the clock control unit generates the clock by dividing the predetermined frequency of the reference clock by m (m being an integer), so that the clock has a desired frequency.

11. A camera including the solid-state imaging device of claim 1 .

12. A solid-state imaging device comprising:

a pixel array in which a plurality of pixels are arranged in rows and columns;

a counter operable to count input clock pulses;

a clock control unit operable to generate a clock that is to be input into the counter, and change frequency of the clock based on external input data; and

a plurality of analog-digital conversion units that are arranged in one-to-one correspondence with the columns of the pixel array, each of the analog-digital conversion units being operable to obtain, for each pixel in a corresponding column, a number of counts as a digital value of a pixel signal output from a pixel in the corresponding column, the number of counts being counted by the counter during a period whose length is determined in accordance with an analog value of the pixel signal, wherein

the external input data indicates a brightness of a scene derived from a level of each of the pixel signals that have been output from the pixels, and

the clock control unit changes the frequency of the clock in a manner that the brighter the brightness of the scene is, the lower the frequency of the clock is.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2020
From: PANASONIC CORPORATION
To: PANASONIC SEMICONDUCTOR SOLUTIONS CO., LTD.
Reel/Frame 052755/0917 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 2, 2009
From: MURAKAMI, MASASHI; SHIMOMURA, KENICHI
To: PANASONIC CORPORATION
Reel/Frame 022048/0458 →