IP Library Granted Patent US 8,927,392
Granted Patent B2
US 8,927,392 · App. 12/262,731 · Granted Jan 6, 2015

Methods for forming crystalline thin-film photovoltaic structures

Inventor: Leslie G. Fritzemeier (Lexington, MA)
Assignee: Siva Power, Inc.
H01L33/007H01L31/0304H01L31/0392H01L31/0693H01L31/1852H01L21/02367H01L21/02491H01L21/02505H01L21/02521H01L33/12H01S5/0215Y02E10/544
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Quick Facts
Patent No.
US 8,927,392
App. No.
12/262,731
Granted
Jan 6, 2015
Kind
B2
Abstract

Methods for forming semiconductor devices include providing a textured template, forming a buffer layer over the textured template, forming a substrate layer over the buffer layer, removing the textured template, thereby exposing a surface of the buffer layer, and forming a semiconductor layer over the exposed surface of the buffer layer.

Claims (35)

1. A method for forming a semiconductor device, the method comprising:

providing a textured polycrystalline metal template;

forming a buffer layer over the textured template;

forming a substrate layer over the buffer layer;

removing the textured template, thereby exposing a surface of the buffer layer; and

forming a semiconductor layer over the exposed surface of the buffer layer.

2. The method of claim 1 , wherein, during formation of the buffer layer, the buffer layer inherits the texture of the textured template.

3. The method of claim 2 , wherein the texture appears on the exposed surface of the buffer layer.

4. The method of claim 1 , further comprising forming a sacrificial layer over the textured template prior to forming the buffer layer.

5. The method of claim 4 , wherein, during formation of the sacrificial layer, the sacrificial layer inherits the texture of the textured template.

6. The method of claim 4 , further comprising removing the sacrificial layer during removal of the textured template.

7. The method of claim 4 , wherein the sacrificial layer comprises Pd.

8. The method of claim 1 , further comprising forming an insulator layer over the buffer layer prior to forming the substrate layer.

9. The method of claim 8 , wherein the insulator layer comprises an oxide.

10. The method of claim 1 , further comprising forming a diffusion barrier over the buffer layer prior to forming the substrate layer.

11. The method of claim 10 , wherein the diffusion barrier is substantially free of the texture of the textured template.

12. The method of claim 10 , wherein the diffusion barrier comprises at least one of W, Re, an oxide, or a nitride.

13. The method of claim 12 , wherein the diffusion barrier comprises W.

14. The method of claim 1 , wherein the substrate layer comprises at least one of W, Mo, a metal alloy, a ceramic, or a glass.

15. The method of claim 1 , wherein the substrate layer comprises a material substantially impervious to formation of at least one of As-containing phases or Si-containing phases at a temperature greater than approximately 350° C.

16. The method of claim 1 , wherein the substrate layer is substantially free of the texture of the textured template.

17. The method of claim 1 , wherein the semiconductor layer comprises at least one of Si, Ge, or InGaAs.

18. The method of claim 1 , wherein a coefficient of thermal expansion of the substrate layer substantially matches a coefficient of thermal expansion of the semiconductor layer.

19. The method of claim 1 , wherein the buffer layer comprises at least one of Cr, an oxide, or a nitride.

20. The method of claim 1 , wherein the textured template comprises at least one of Cu, Ni, or a Cu—Ni alloy.

21. The method of claim 1 , wherein the semiconductor layer comprises at least one of a p-n junction or a p-i-n junction.

22. The method of claim 1 , further comprising forming a semiconductor device on the semiconductor layer.

23. The method of claim 22 , wherein the semiconductor device comprises at least one of GaAs, AlGaAs, InGaP, InGaAsN, InGaAsP, InP, AlInAs, or InGaAs.

24. The method of claim 22 , wherein the semiconductor device comprises at least one of a photovoltaic cell, a light-emitting diode, or a laser.

25. The method of claim 22 , wherein the substrate layer functions as a back contact for the semiconductor device.

26. The method of claim 1 , wherein the buffer layer and the substrate layer are each formed by deposition.

27. The method of claim 26 , wherein the deposition is performed without ion-beam assistance.

28. The method of claim 1 , wherein the buffer layer is a polycrystalline metal.

29. The method of claim 28 , wherein the semiconductor layer is formed directly on the exposed surface of the buffer layer.

30. The method of claim 1 , wherein the textured template is deformation textured.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 23, 2020
From: SIVA POWER INC.
To: FIRST SOLAR, INC.
Reel/Frame 052197/0293 →
CHANGE OF NAME Recorded Mar 18, 2014
From: SOLEXANT CORP.
To: SIVA POWER, INC.
Reel/Frame 032463/0703 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 8, 2012
From: REALTIME DX, INC.
To: SOLEXANT CORP.
Reel/Frame 028172/0831 →
MERGER Recorded Jan 13, 2011
From: WAKONDA TECHNOLOGIES, INC.
To: REALTIME DX, INC.
Reel/Frame 025635/0211 →
SECURITY AGREEMENT Recorded Feb 10, 2010
From: WAKONDA TECHNOLOGIES, INC.
To: SILICON VALLEY BANK
Reel/Frame 023922/0513 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 31, 2009
From: FRITZEMEIER, LESLIE G.
To: WAKONDA TECHNOLOGIES, INC.
Reel/Frame 023170/0412 →
Continuity (2)
Provisional Application 60984796 · Nov 2, 2007
Related Publication 20090117679A1 · May 7, 2009