CRYSTALLINE THIN-FILM PHOTOVOLTAIC STRUCTURES
Semiconductor structures include a substantially untextured substrate layer, a textured buffer layer disposed over the substrate layer, and a semiconductor layer disposed over the textured buffer layer.
1 . A semiconductor structure comprising:
a substantially untextured substrate layer;
a textured buffer layer disposed over the substrate layer; and
a semiconductor layer disposed over the textured buffer layer.
2 . The semiconductor structure of claim 1 , wherein a grain size of the textured buffer layer is greater than approximately 25 μm.
3 . The semiconductor structure of claim 1 , wherein the textured buffer layer comprises a metal or a metal alloy.
4 . The semiconductor structure of claim 3 , wherein the textured buffer layer comprises Cr.
5 . The semiconductor structure of claim 1 , wherein the textured buffer layer comprises at least one of an oxide or a nitride.
6 . The semiconductor structure of claim 1 , further comprising a diffusion barrier disposed between the substrate layer and the textured buffer layer.
7 . The semiconductor structure of claim 6 , wherein the diffusion barrier comprises a metal or a metal alloy.
8 . The semiconductor structure of claim 7 , wherein the diffusion barrier comprises at least one of W or Re.
9 . The semiconductor structure of claim 6 , wherein the diffusion barrier comprises at least one of an oxide or a nitride.
10 . The semiconductor structure of claim 1 , further comprising an insulator layer disposed between the substrate layer and the textured buffer layer.
11 . The semiconductor structure of claim 10 , wherein the insulator layer comprises an oxide.
12 . The semiconductor structure of claim 1 , wherein the substrate layer comprises at least one of W, Mo, a metal alloy, a ceramic, or a glass.
13 . The semiconductor structure of claim 1 , wherein a coefficient of thermal expansion of the substrate layer substantially matches a coefficient of thermal expansion of the semiconductor layer.
14 . The semiconductor structure of claim 1 , further comprising a semiconductor device disposed over the semiconductor layer.
15 . The semiconductor structure of claim 14 , wherein the semiconductor device comprises at least one of a photovoltaic cell, a light-emitting diode, or a laser.
16 . The semiconductor structure of claim 14 , wherein the semiconductor device comprises at least one of GaAs, AlGaAs, InGaP, InGaAsN, InGaAsP, InP, AlInAs, or InGaAs.
17 . A semiconductor device comprising:
a substantially untextured flexible substrate layer; and
a plurality of textured semiconductor junctions disposed over the substrate layer.
18 . The semiconductor device of claim 17 , further comprising a textured buffer layer disposed between the substrate layer and the plurality of semiconductor junctions.
19 . The semiconductor device of claim 17 , further comprising an insulator layer disposed between the substrate layer and the plurality of semiconductor junctions.
20 . The semiconductor device of claim 17 , wherein the plurality of semiconductor junctions form a photovoltaic cell having an energy conversion efficiency greater than approximately 15%.
21 . The semiconductor device of claim 17 , wherein a grain size of each of the semiconductor junctions is greater than approximately 25 μm.
22 . A structure comprising:
a textured template comprising a first metal;
a buffer layer disposed over the textured template, the buffer layer comprising a second metal different from the first metal; and
a substantially untextured substrate layer disposed over the buffer layer, the substrate layer comprising at least one of a ceramic, a glass, or a third metal different from both the first and second metals.
23 . The structure of claim 22 , wherein a texture of the buffer layer substantially matches the texture of the textured template.
24 . The structure of claim 22 , wherein the substrate layer comprises a material substantially impervious to formation of at least one of As-containing phases or Si-containing phases at a temperature greater than approximately 350° C., and the textured template comprises a material that forms at least one of As-containing phases or Si-containing phases at a temperature greater than approximately 350° C.
25 . The structure of claim 22 , further comprising a substantially untextured diffusion barrier disposed between the buffer layer and the substrate layer, the diffusion layer comprising at least one of an oxide, a nitride, or a fourth metal different from the first, second, and third metals.
26 . The structure of claim 22 , further comprising a textured sacrificial layer comprising Pd disposed between the textured template and the buffer layer.