IP Library Granted Patent US 8,346,531
Granted Patent B2
US 8,346,531 · App. 12/264,944 · Granted Jan 1, 2013

Handling mutex locks in a dynamic binary translation across heterogeneous computer systems

Assignee: Oracle America, Inc.
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Quick Facts
Patent No.
US 8,346,531
App. No.
12/264,944
Granted
Jan 1, 2013
Kind
B2
Abstract

A method for executing non-native binaries on a host computer architecture comprises receiving a guest executable binary encoded on a computer readable medium. The guest executable binary is executable on a first computer architecture. Moreover, the guest executable binary includes a mutex lock encoded instructions for implementing a mutex lock. The guest executable binary is then executed on the host computer architecture by first translating the guest executable binary to a translated executable binary. The encoded instructions for implementing a mutex lock are translated by mapping the mutex lock to an instance of a compound mutex lock data structure. A computer system implementing methods for executing non-native binaries on a host computer architecture is also provided.

Claims (44)

1. A method for executing non-native binaries on a host computer architecture, the method comprising:

a) receiving a guest executable binary encoded on a non-transitory computer readable medium, the guest executable binary executable on a first computer architecture and including mutex lock encoded instructions for implementing a mutex lock;

b) executing the guest executable binary on the host computer architecture by:

translating the guest executable binary to a translated executable binary, such that the encoded instructions for implementing a mutex lock are translated by:

mapping the mutex lock to an instance of a compound mutex lock data structure, the compound mutex lock data structure comprising:

a pointer to a first mutex lock data structure;

a pointer to a second mutex lock data structure, wherein the first mutex lock data structure interacts with the encoded instructions in a manner that simulates operation of a mutex lock on the first computer architecture; and the second mutex data structure is the mutex lock data structure native to the host computer architecture; and

executing each instruction of the executable binary.

2. The method of claim 1 wherein translated instructions are cached in computer memory to be used for subsequent executions.

3. The method of claim 1 wherein translation of the mutex lock encoded instructions comprises translating byte ordering from the first computer architecture to the host computer architecture.

4. The method of claim 1 wherein the first mutex lock data structure is private to the guest executable binary.

5. The method of claim 1 wherein the second mutex lock data structure is shared among two or more processes.

6. The method of claim 1 wherein system calls of the first computer architecture are simulated.

7. The method of claim 6 wherein system calls of the first computer architecture are implemented by atomic operations of the host computer architecture.

8. The method of claim 1 wherein step b) comprises dynamic translation.

9. The method of claim 1 wherein step b) comprises mapping the registers of the first computer architecture to the host computer architecture.

10. The method of claim 8 wherein translation comprises receptively translating a small section of the guest binary.

11. A method for executing non-native binaries on a host computer architecture, the method comprising:

a) receiving a guest executable binary encoded on a non-transitory computer readable medium, the guest executable binary executable on a first computer architecture and including mutex lock encoded instructions for implementing a mutex lock;

b) executing the guest executable binary on the host computer architecture by:

translating the guest executable binary to a translated executable binary, such that the encoded instructions for implementing a mutex lock are translated by:

presenting a first mutex lock data structure that interacts with the encoded instructions in a manner that simulates operation of a mutex lock on the first computer architecture; and

translating the first mutex lock data structure to an instance of a second mutex lock data structure, the second mutex data structure being native to the host computer architecture; and

executing each instruction of the executable binary.

12. The method of claim 11 wherein translated instructions are cached in computer memory for subsequent executions.

13. The method of claim 11 wherein the first mutex lock data structure and the second mutex lock data structure are combined together into a combined mutex lock data structure.

14. The method of claim 11 wherein translation of the mutex lock encoded instructions comprises translating byte ordering from the first computer architecture to the host computer architecture.

15. The method of claim 1 wherein member methods of the first mutex lock data structure are translated into member methods of the second mutex lock data structure.

16. The method of claim 1 wherein the first mutex lock data structure is private to the guest executable binary and the second mutex lock data structure is shared among two or more processes.

17. The method of claim 1 wherein the second mutex lock data structure is shared among two or more processes.

18. A computer system for executing non-native binaries, the computer system comprising:

a computer processor;

a computer memory in communication with the computer processor; and

a storage device in communication with the computer processor,

the computer processor operable to:

a) receive a guest executable binary encoded on a non-transitory computer readable medium, the guest executable binary executable on a first computer architecture and including mutex lock encoded instructions for implementing a mutex lock;

b) execute the guest executable binary on the computer system by:

translating the guest executable binary to a translated executable binary, such that the encoded instructions for implementing a mutex lock are translated by:

mapping the mutex lock to an instance of a compound mutex lock data structure, the compound mutex lock data structure comprising:

a pointer to a first mutex lock data structure;

a pointer to a second mutex lock data structure, wherein the first mutex lock data structure interacts with the encoded instructions in a manner that simulates operation of a mutex lock on the first computer architecture; and the second mutex data structure is the mutex lock data structure native to the computer system; and

executing each instruction of the executable binary.

19. The computer system of claim 18 further comprising computer memory onto which the non-native binary is encoded.

20. The computer system of claim 18 further comprising memory onto which code that translates the guest executable binary to a translated executable binary is encoded.

Assignments (2)
MERGER AND CHANGE OF NAME Recorded Dec 16, 2015
From: ORACLE USA, INC.; SUN MICROSYSTEMS, INC.; ORACLE AMERICA, INC.
To: ORACLE AMERICA, INC.
Reel/Frame 037311/0195 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 25, 2008
From: DAS, ABHINAV; LU, JIWEI; CHEN, WILLIAM Y.; BANERJEE, CHANDRAMOULI
To: SUN MICROSYSTEMS, INC.
Reel/Frame 021886/0637 →
Continuity (1)
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