IP Library Granted Patent US 7,944,276
Granted Patent B2
US 7,944,276 · App. 12/265,189 · Granted May 17, 2011

Charge pump circuit and electronic apparatus provided with the same

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Quick Facts
Patent No.
US 7,944,276
App. No.
12/265,189
Granted
May 17, 2011
Kind
B2
Abstract

A pumping circuit includes: a pumping capacitance; a first drive transistor connected between an input node for receiving an input voltage and one terminal of the pumping capacitance; and a second drive transistor connected between an output node for outputting an output voltage and the one terminal of the pumping capacitance. In a charge storing mode, the first drive transistor is turned ON to store charge in the pumping capacitance, while in a charge transfer mode, the second drive transistor is turned ON to transfer the charge stored in the pumping capacitance to the output node. The protection circuit puts at least one of the first and second drive transistors in a high-resistance state in which the resistance value is higher than when the transistor is ON, based on whether the output voltage is higher or lower than a predetermined judgment voltage.

Claims (44)

1. A charge pump circuit for stepping up or down an input voltage to output a stepped-up or stepped-down output voltage, comprising:

a pumping circuit; and

a protection circuit,

wherein the pumping circuit comprises:

a pumping capacitance;

a first drive transistor connected between an input node for receiving the input voltage and one terminal of the pumping capacitance; and

a second drive transistor connected between an output node for outputting the output voltage and the one terminal of the pumping capacitance, wherein

in a charge storing mode, the first drive transistor is turned ON to store charge in the pumping capacitance, while in a charge transfer mode, the second drive transistor is turned ON to transfer the charge stored in the pumping capacitance to the output node, and

if the output voltage is lower than a judgment voltage during stepping up then the protection circuit puts at least one of the first and second drive transistors in a high-resistance state in which the resistance value is higher than when the transistor is ON, said judgment voltage is equal to or lower than the input voltage.

2. The charge pump circuit of claim 1 , wherein the protection circuit comprises a first protection transistor having a source connected to a first set node for receiving a first set voltage for putting the first drive transistor in the high-resistance state, a gate connected to the output node, and a drain connected to a gate of the first drive transistor.

3. The charge pump circuit of claim 2 , wherein the protection circuit further comprises a second protection transistor having a source connected to a second set node for receiving a second set voltage for putting the second drive transistor in the high-resistance state, a gate connected to the output node, and a drain connected to a gate of the second drive transistor.

4. The charge pump circuit of claim 1 , wherein the protection circuit comprises:

a first comparison circuit for comparing the output voltage at the output node with the judgment voltage; and

a first protection switch connected between a first set node for receiving a first set voltage for putting the first drive transistor in the high-resistance state and a gate of the first drive transistor, the first protection switch turning ON/OFF in response to a comparison result of the first comparison circuit.

5. The charge pump circuit of claim 4 , wherein the protection circuit further comprises:

a second comparison circuit for comparing the output voltage at the output node with the judgment voltage, and

a second protection switch connected between a second set node for receiving a second set voltage for putting the second drive transistor in the high-resistance state and a gate of the second drive transistor, the second protection switch turning ON/OFF in response to a comparison result of the second comparison circuit.

6. The charge pump circuit of claim 4 , wherein the protection circuit further comprises:

a second protection switch connected between a second set node for receiving a second set voltage for putting the second drive transistor in the high-resistance state and a gate of the second drive transistor, the second protection switch turning ON/OFF in response to the comparison result of the first comparison circuit.

7. The charge pump circuit of claim 2 , wherein the first set node is the input node.

8. The charge pump circuit of claim 3 , wherein the second set node is the input node.

9. An electronic apparatus comprising the charge pump circuit of claim 1 .

10. A charge pump circuit for stepping up or down an input voltage to output a stepped-up or stepped-down output voltage, comprising:

a pumping circuit; and

a protection circuit,

wherein the pumping circuit comprises:

a pumping capacitance;

a first drive transistor connected between an input node for receiving the input voltage and one terminal of the pumping capacitance; and

a second drive transistor connected between an output node for outputting the output voltage and the one terminal of the pumping capacitance, wherein

in a charge storing mode, the first drive transistor is turned ON to store charge in the pumping capacitance, while in a charge transfer mode, the second drive transistor is turned ON to transfer the charge stored in the pumping capacitance to the output node, and

if the output voltage is higher than a judgment voltage during stepping down then the protection circuit puts at least one of the first and second drive transistors in a high-resistance state in which the resistance value is higher than when the transistor is ON, said judgment voltage is equal to or higher than the input voltage.

11. The charge pump circuit of claim 10 , wherein the protection circuit comprises a first protection transistor having a source connected to a first set node for receiving a first set voltage for putting the first drive transistor in the high-resistance state, a gate connected to the output node, and a drain connected to a gate of the first drive transistor.

12. The charge pump circuit of claim 11 , wherein the protection circuit further comprises a second protection transistor having a source connected to a second set node for receiving a second set voltage for putting the second drive transistor in the high-resistance state, a gate connected to the output node, and a drain connected to a gate of the second drive transistor.

13. The charge pump circuit of claim 10 , wherein the protection circuit comprises:

a first comparison circuit for comparing the output voltage at the output node with the judgment voltage; and

a first protection switch connected between a first set node for receiving a first set voltage for putting the first drive transistor in the high-resistance state and a gate of the first drive transistor, the first protection switch turning ON/OFF in response to a comparison result of the first comparison circuit.

14. The charge pump circuit of claim 13 , wherein the protection circuit further comprises:

a second comparison circuit for comparing the output voltage at the output node with the judgment voltage, and

a second protection switch connected between a second set node for receiving a second set voltage for putting the second drive transistor in the high-resistance state and a gate of the second drive transistor, the second protection switch turning ON/OFF in response to a comparison result of the second comparison circuit.

15. The charge pump circuit of claim 13 , wherein the protection circuit further comprises:

a second protection switch connected between a second set node for receiving a second set voltage for putting the second drive transistor in the high-resistance state and a gate of the second drive transistor, the second protection switch turning ON/OFF in response to the comparison result of the first comparison circuit.

16. The charge pump circuit of claim 11 , wherein the first set node is the input node.

17. The charge pump circuit of claim 12 , wherein the second set node is the input node.

18. An electronic apparatus comprising the charge pump circuit of claim 10 .

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 26, 2014
From: PANASONIC CORPORATION
To: COLLABO INNOVATIONS, INC.
Reel/Frame 033021/0806 →
LIEN Recorded Jan 13, 2014
From: COLLABO INNOVATIONS, INC.
To: PANASONIC CORPORATION
Reel/Frame 031997/0445 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 7, 2009
From: NAKAI, TAKAYUKI
To: PANASONIC CORPORATION
Reel/Frame 022068/0930 →