IP Library Granted Patent US 7,737,465
Granted Patent B2
US 7,737,465 · App. 12/268,028 · Granted Jun 15, 2010

Semiconductor apparatus and manufacturing method thereof

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Quick Facts
Patent No.
US 7,737,465
App. No.
12/268,028
Granted
Jun 15, 2010
Kind
B2
Abstract

The present invention provides a semiconductor apparatus for improving a switching speed and a withstand voltage, and a manufacturing method of the semiconductor apparatus. The semiconductor apparatus of the invention including a first conductive type semiconductor substrate, a first conductive type first semiconductor region with an impurity concentration lower than that of the semiconductor substrate and formed on a first principal surface of the semiconductor substrate, a second conductive type second semiconductor region formed in a surface region of the first semiconductor region and which forms a PN junction with the first semiconductor region, a contact region including a part of the first semiconductor region and a part of the second semiconductor region, an insulating layer having an opening part through which at least the contact region are exposed, a first electrode formed so as to be in contact with at least the contact region and a second electrode formed on a second principal surface of the semiconductor substrate, wherein the second semiconductor region, viewed from a direction perpendicular to the first principal surface includes a first region in which a plurality of islands of the second semiconductor are aligned with intervals and a second region which connects each end of the islands of the first region each other.

Claims (14)

1. A semiconductor apparatus comprising:

a first conductive type semiconductor substrate;

a first conductive type first semiconductor region with an impurity concentration lower than that of the semiconductor substrate and formed on a first principal surface of the semiconductor substrate;

a second conductive type second semiconductor region formed in a surface region of the first semiconductor region and which forms a PN junction with the first semiconductor region;

a contact region including a part of the first semiconductor region and a part of the second semiconductor region;

an insulating layer having an opening part through which at least the contact region are exposed;

a first electrode formed so as to be in contact with at least the contact region; and

a second electrode formed on a second principal surface of the semiconductor substrate,

wherein the second semiconductor region, viewed from a direction perpendicular to the first principal surface, comprises:

a first region in which a plurality of islands of the second semiconductor region are aligned with intervals; and

a second region which connects each end of the islands of the first region each other.

2. The semiconductor apparatus according to claim 1 , wherein a corner of the second semiconductor region has a round shape.

3. The semiconductor apparatus according to claim 1 , wherein the first electrode is formed of aluminum or an alloy primarily including aluminum.

4. A semiconductor apparatus according to claims 1 , wherein a Schottky junction between the first electrode and the first semiconductor region is formed and an ohmic junction between the first electrode and the second semiconductor region is formed.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2020
From: PANASONIC CORPORATION
To: PANASONIC SEMICONDUCTOR SOLUTIONS CO., LTD.
Reel/Frame 052755/0917 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 2, 2009
From: YOSHII, RYO
To: PANASONIC CORPORATION
Reel/Frame 022187/0120 →