Signal line for display device and thin film transistor array panel including the signal line
View Patent ↗A thin film transistor (TFT) array panel with signal lines that have low resistivity is presented. The TFT array panel includes an insulating substrate, a gate line formed on the insulating substrate, a gate insulating layer formed on the gate line, a drain electrode and a data line having a source electrode formed on the gate insulating layer, the drain electrode facing the source electrode with a gap, and a pixel electrode connected to the drain electrode. In one embodiment, at least one of the gate line, the data line, and the drain electrode includes a first conductive layer made of a Mo-containing conductor, a second conductive layer made of a Cu-containing conductor, and a third conductive layer made of a MoN-containing conductor.
1. A manufacturing method of a thin film transistor array panel comprising:
forming a gate line having a gate electrode on an insulating substrate;
depositing a gate insulating layer and a semiconductor layer on the gate line in sequence;
forming a drain electrode and a data line having a source electrode on the gate insulating layer and the semiconductor layer, the drain electrode being separate from the source electrode; and
forming a pixel electrode connected to the drain electrode,
wherein at least one step of the forming a gate line and the forming a data line and drain electrode comprises depositing a first conductive layer of a Mo-containing conductor, a second conductive layer of a Cu-containing conductor, and a third conductive layer of a Mo—N-containing conductor and patterning the first to third conductive layers,
wherein the second conductive layer is disposed on the first conductive layer and the third conductive layer is disposed on the second conductive layer.
2. The method of claim 1 , wherein the first conductive layer has a thickness of about 50 to about 500 Å.
3. The method of claim 1 , wherein the third conductive layer has a thickness of about 50 to about 2,000 Å.
4. The method of claim 1 , wherein the deposition of the third layer is performed in an atmosphere comprising a nitrogen-containing gas.
5. The method of claim 4 , wherein the nitrogen-containing gas comprises one of molecular nitrogen, nitrous oxide, and ammonia.
6. The method of claim 1 , wherein at least one of the forming a gate line and forming a data line and drain electrode further comprises etching the first to third conductive layers simultaneously with an etchant.
7. The method of claim 6 , wherein the etchant for etching the first to third conductive layers comprises H 2 O 2 .
8. The method of claim 1 , wherein the data line and the semiconductor layer are formed by a photo-etching using a photoresist pattern having a first portion, a second portion thicker than the first portion, and a third portion thinner than the first portion.
9. The method of claim 8 , wherein the first portion is disposed between the source electrode and the drain electrode, and the second portion is disposed on the data line and the drain electrode.