Folding sequential adaptive equalizer
View Patent ↗A folding adaptive equalizer is provided. The equalizer comprises an equalizer core and an automatic gain control loop. The equalizing transfer function of the equalizer core is modulated by one or more gain control signals generated by the automatic gain control loop and by a folding signal generated by the automatic gain control loop. When the folding signal is inactive, an increase in the gain control signals produces an increase in the high-frequency, high-bandwidth gain of the transfer function of the equalizer core. When the folding signal is active, further gain can be applied by decreasing the gain control signals, which produces a frequency-shift in the transfer function of the equalizer core toward lower bandwidth and an increase in the high-frequency, low-bandwidth gain of the transfer function of the equalizer core.
1. A gain stage, comprising:
a high-bandwidth gain circuit that applies a high-bandwidth transfer function to a first input signal, the high-bandwidth transfer function having high-bandwidth gain modulated by the level of a second input signal; and
a low-bandwidth gain circuit that applies a low-bandwidth transfer function to the first input signal, the low-bandwidth transfer function having zero gain if a third input signal is at a first level and having low-bandwidth gain inversely modulated by the level of the second input signal if the third input signal is at a second level.
2. The gain stage of claim 1 , wherein the first input signal comprises a signal received by the gain stage after being transmitted through a non-ideal transmission medium and the second input signal comprises an automatic gain control signal.
3. The gain stage of claim 1 , wherein the transfer functions applied by the high-bandwidth gain module and the low-bandwidth gain module have frequency-dependent gain.
4. The gain stage of claim 1 , wherein the gain stage produces a continuous output signal in response to both continuous and discontinuous transitions between the first level and the second level of the third input signal.
5. The gain stage of claim 1 , wherein the gain stage produces an output signal equal to the first input signal with the transfer functions of the high-bandwidth gain circuit and the low-bandwidth gain circuit applied to it.
6. The gain stage of claim 5 , wherein the gain stage further comprises a flat gain pathway that is summed with the gain contributed by each of the gain circuits to produce the output signal of the gain stage.
7. The gain stage of claim 5 , further comprising:
a first flat gain pathway producing an output signal equal to the first input signal modulated by the second input signal;
a second flat gain pathway producing an output signal equal to the first input signal inversely modulated by the second input signal; and
the output signal of the gain stage is equal to the sum of the output signal of the first flat gain pathway, the output signal of the second flat gain pathway, the gain contributed by the high-bandwidth gain circuit, and the gain contributed by the low-bandwidth gain circuit.
8. The gain stage of claim 1 , wherein the high-bandwidth gain circuit and the low-bandwidth gain circuit share some common circuit components.