IP Library Granted Patent US 7,704,780
Granted Patent B2
US 7,704,780 · App. 12/273,123 · Granted Apr 27, 2010

Optical enhancement of integrated circuit photodetectors

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Quick Facts
Patent No.
US 7,704,780
App. No.
12/273,123
Granted
Apr 27, 2010
Kind
B2
Abstract

A semiconductor integrated circuit structure and method for fabricating. The semiconductor integrated circuit structure includes a light sensitive device integral with a semiconductor substrate, a cover dielectric layer disposed over the light sensitive device, and a lens-formation dielectric layer disposed over the cover dielectric layer. Light is transmittable though the cover dielectric layer, and through the lens-formation dielectric layer. The lens-formation dielectric layer forms an embedded convex microlens. The microlens directs light onto the light sensitive device.

Claims (49)

1. A method of fabricating a semiconductor integrated circuit structure, the method comprising the steps of:

disposing a cover dielectric over a light sensitive device integral with a semiconductor substrate; and

disposing a lens-formation dielectric over the cover dielectric, the lens-formation dielectric formed from a silicon-rich oxynitride having an index of refraction adjustable by changing relative atomic percentages of silicon, oxygen and nitrogen,

wherein the step of disposing the cover dielectric over the light sensitive device comprises the steps of:

applying a photoresist over the light sensitive device;

exposing the photoresist in a preselected pattern;

developing the photoresist in a preselected pattern, to remove the photoresist in conformance with the preselected pattern;

etching the light sensitive device in the area where the photoresist has been exposed; and

removing the photoresist remaining after etching to form the cover dielectric in the etched areas.

2. The method of claim 1 ,

wherein the index of refraction of the silicon-rich oxynitride is adjustable in the range of 1.70 to 1.85.

3. The method of claim 1 , further comprising the step of creating the light sensitive device.

4. The method of claim 1 , wherein the step of disposing the lens-formation dielectric over the cover dielectric comprises the following steps:

applying a photoresist over the cover dielectric;

exposing the photoresist in a preselected pattern;

developing the photoresist to remove the photoresist in conformance with the preselected pattern;

reflowing the remaining photoresist; and

etching the lens-formation dielectric and remaining photoresist with an etch having a low selectivity between the lens-formation dielectric and the photoresist.

5. A method of fabricating a semiconductor integrated circuit structure, the method comprising the steps of:

forming an n-type well in a p-type silicon substrate;

etching at least a portion of the silicon substrate to form a recessed portion in the silicon substrate;

growing a cover dielectric in the recessed portion;

disposing a lens-formation dielectric on top of the cover dielectric, the lens-formation dielectric layer formed from a silicon-rich oxynitride having an index of refraction adjustable by changing relative atomic percentages of silicon, oxygen and nitrogen.

6. The method of claim 5 ,

wherein the index of refraction of the silicon-rich oxynitride is adjustable in the range of 1.70 to 1.85.

7. The method of claim 5 , wherein the step of disposing a lens-formation dielectric over the cover dielectric comprises the following steps:

applying a photoresist over the cover dielectric;

exposing the photoresist in a preselected pattern;

developing the photoresist to remove the photoresist in conformance with the preselected pattern;

reflowing the remaining photoresist; and

etching the lens-formation dielectric and remaining photoresist with an etch having a low selectivity between the lens-formation dielectric and the photoresist.

8. A method of fabricating a semiconductor integrated circuit structure, the method comprising the steps of:

disposing a cover dielectric over a light sensitive device integral with a semiconductor substrate; and

disposing a lens-formation dielectric over the cover dielectric, the lens-formation dielectric formed from a silicon-rich oxynitride having an index of refraction adjustable by changing relative atomic percentages of silicon, oxygen and nitrogen;

wherein the step of disposing the lens-formation dielectric over the cover dielectric comprises the following steps:

applying a photoresist over the cover dielectric;

exposing the photoresist in a preselected pattern;

developing the photoresist to remove the photoresist in conformance with the preselected pattern;

reflowing the remaining photoresist; and

etching the lens-formation dielectric and remaining photoresist with an etch having a low selectivity between the lens-formation dielectric and the photoresist.

9. The method of claim 8 ,

wherein the index of refraction of the silicon-rich oxynitride is adjustable in the range of 1.70 to 1.85.

10. The method of claim 8 , further comprising the step of creating the light sensitive device.

11. The method of claim 8 , wherein the step of disposing the cover dielectric over the light sensitive device comprises the steps of:

applying a photoresist over the light sensitive device;

exposing the photoresist in a preselected pattern;

developing the photoresist in a preselected pattern, to remove the photoresist in conformance with the preselected pattern;

etching the light sensitive device in the area where the photoresist has been exposed; and

removing the photoresist remaining after etching to form the cover dielectric in the etched areas.

Assignments (6)
CORRECTIVE ASSIGNMENT TO CORRECT THE THIRD ASSIGNOR NAME PREVIOUSLY RECORDED AT REEL: 040000 FRAME: 0751. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT . Recorded Nov 9, 2016
From: PALSULE, CHINTAMANI; STANBACK, JOHN H.; DUNGAN, THOMAS E.; CROOK, MARK D.
To: AGILENT TECHNOLOGIES, INC.
Reel/Frame 040581/0840 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 18, 2016
From: MICRON TECHNOLOGY, INC.
To: APTINA IMAGING CORPORATION
Reel/Frame 040396/0799 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 17, 2016
From: AVAGO TECHNOLOGIES IMAGING HOLDING CORPORATION
To: MICRON TECHNOLOGY, INC.
Reel/Frame 040381/0347 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 13, 2016
From: AGILENT TECHNOLOGIES, INC.
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 040350/0280 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 13, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES SENSOR IP PTE. LTD.
Reel/Frame 040350/0541 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 12, 2016
From: PALSULE, CHINTAMANI; STANBACK, JOHN H.; DUNCAN, THOMAS E.; CROOK, MARK D.
To: AGILENT TECHNOLOGIES, INC.
Reel/Frame 040000/0751 →