THIN FILM TRANSISTOR SUBSTRATE, METHOD OF MANUFACTURING THEREOF AND LIQUID CRYSTAL DISPLAY DEVICE
A method for manufacturing a thin film transistor substrate includes forming a thin film transistor array comprising gate lines, data lines and a semiconductor layer on a substrate, applying an organic layer on the thin film transistor array, pressing the organic layer with a mold comprising a prescribed pattern, removing the mold from the organic layer; and hardening the organic layer to form a passivation layer comprising a contact hole and a bank connected to the contact hole.
1 . A thin film transistor substrate, comprising:
a substrate;
a thin film transistor array comprising gate lines, data lines and a semiconductor layer on the substrate;
a passivation layer on the thin film transistor array, the passivation layer comprising a contact hole and a bank connected to the contact hole; and
a pixel electrode connected to the thin film transistor array through the contact hole.
2 . The thin film transistor substrate of claim 1 , wherein the pixel electrode is positioned in the bank.
3 . The thin film transistor substrate of claim 2 , wherein a top surface extending from the passivation layer to the pixel electrode is flat.
4 . The thin film transistor substrate of claim 1 , wherein the passivation layer further comprises a columnar spacer.
5 . The thin film transistor substrate of claim 1 , further comprising a dielectric layer formed between the passivation layer and the thin film transistor array.
6 . The thin film transistor substrate of claim 5 , wherein the dielectric layer comprises an aperture corresponding to the contact hole.
7 . A method for manufacturing a thin film transistor substrate, the method comprising:
forming a thin film transistor array comprising gate lines, data lines and a semiconductor layer on a substrate;
applying an organic layer on the thin film transistor array;
pressing the organic layer with a mold comprising a prescribed pattern;
removing the mold from the organic layer; and
hardening the organic layer to form a passivation layer comprising a contact hole and a bank connected to the contact hole.
8 . The method of claim 7 , wherein the mold comprises a first projection to form the contact hole and a second projection to form the bank.
9 . The method of claim 8 , wherein the first projection is connected to the second projection.
10 . The method of claim 8 , wherein the passivation layer further comprises a column spacer.
11 . The method of claim 10 , wherein the mold comprises a depression to form the column spacer.
12 . The method of claim 7 , further comprising forming a pixel electrode in the bank, wherein the pixel electrode is connected to the thin film transistor array through the contact hole.
13 . The method of claim 12 , wherein a top surface extending from the passivation layer to the pixel electrode is flat.
14 . The method of claim 13 , wherein the pixel electrode is formed by an inkjet process.
15 . The method of claim 7 , further comprising forming a dielectric layer on the thin film transistor array before applying the organic layer.
16 . The method of claim 15 , further comprising removing a portion of the dielectric layer by an etching process after removing the mold.
17 . A liquid crystal display, comprising:
a first substrate;
a thin film transistor array comprising gate lines, data lines and a semiconductor layer on the first substrate;
a passivation layer on the thin film transistor array, the passivation layer comprising a contact hole and a bank connected to the contact hole;
a first electrode connected to the thin film transistor array through the contact hole;
a second substrate facing the first substrate;
a second electrode on the second substrate; and
a liquid crystal layer between the first substrate and second substrate.
18 . The liquid crystal display of claim 17 , wherein the first electrode is positioned in the bank.
19 . The liquid crystal display of claim 18 , wherein a top surface extending from the passivation layer to the first electrode is flat.
20 . The liquid crystal display of claim 17 , further comprising a column spacer on the passivation layer and supporting an interval between the first substrate and the second substrate.
21 . The liquid crystal display of claim 20 , wherein the column spacer and the passivation layer are made of the same layer and of substantially the same material.
22 . The liquid crystal display of claim 21 , wherein the the column spacer continuously extends from the passivation layer.
23 . The liquid crystal display of claim 17 , further comprising a dielectric layer formed between the thin film transistor array and the passivation layer.
24 . The liquid crystal display of claim 23 , wherein the dielectric layer comprises an aperture corresponding to the contact hole.
25 . The liquid crystal display of claim 17 , further comprising a color filter array on the second substrate and the second electrode.