IP Library Granted Patent US 8,874,810
Granted Patent B2
US 8,874,810 · App. 12/276,143 · Granted Oct 28, 2014

System and method for read data buffering wherein analyzing policy determines whether to decrement or increment the count of internal or external buffers

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Quick Facts
Patent No.
US 8,874,810
App. No.
12/276,143
Granted
Oct 28, 2014
Kind
B2
Abstract

Efficient and convenient storage systems and methods are presented. In one embodiment a storage system includes a plurality of storage nodes and a master controller. The storage nodes store information. The storage node includes an upstream communication buffer which is locally controlled at the storage node to facilitate resolution of conflicts in upstream communications. The master controller controlls the flow of traffic to the node based upon constraints of the upstream communication buffer. In one embodiment, communication between the master controller and the node has a determined maximum latency. The storage node can be coupled to the master controller in accordance with a chain memory configuration.

Claims (33)

1. A storage system comprising:

a node of a plurality of nodes for storing information, wherein the node includes an upstream communication buffer; and

a master controller for controlling the flow of traffic to the node based upon constraints of the upstream communication buffer such that scheduling of buffered commands through a downstream interface of said master controller on a downstream communication path from said master controller to said plurality of nodes is configured to ensure that buffers of said plurality of nodes are not exceeded by analyzing information sent from said master controller to said plurality of nodes via said downstream interface and by analyzing information received by said master controller from said plurality of nodes over an upstream communication path via an upstream interface, wherein said buffered commands are temporarily stored at said master controller, wherein communication between the master controller and the node has a determined maximum latency; and wherein a plurality of nodes including the node is coupled to the master controller in accordance with a chain memory configuration; and wherein said master controller is configured for tracking a state of a buffer count of said node when performing said analyzing information by decrementing said buffer count when a request that involves a response is forwarded to said node and incrementing said buffer count when a request response is received from said node.

2. The storage system as claimed in claim 1 wherein the master controller forwards commands to the node and wherein the node executes the command if the node is the target of the command, and the node passes the command to another node if the node is not the target of the command.

3. The storage system as claimed in claim 1 wherein the master controller schedules the commands in a scheme that facilitates simulation of a multi-drop bus hierarchy with a fixed latency.

4. The storage system as claimed in claim 1 wherein the master controller issues commands to the node in accordance with timing characteristics of the individual node and irrespective of the position of the node in the system and other nodes within the system.

5. The storage system as claimed in claim 1 wherein the master controller schedules read commands so that the total available read bandwidth of a link in the chain is not exceeded and upstream interface buffers of the node are not exceeded.

6. The storage system as claimed in claim 1 wherein the node further comprises:

a downstream interface for coupling with a bus carrying data in the direction away from the master controller;

a core storage section for the storage of data; and

an upstream interface for coupling with a bus carrying data in the direction towards the master controller.

7. The storage system as claimed in claim 6 wherein the upstream terminal of the node further comprises:

an internal read buffer for buffering information from within the node awaiting communication upstream;

an external read buffer for buffering information received from another node awaiting communication upstream; and

an internal controller for controlling scheduling of upstream communication of information buffered in the internal read buffer and the external read buffer.

8. The storage system as claimed in claim 1 wherein the node locally manages scheduling of communications from the node, wherein the scheduling includes selection of an external request response or an internal request response for forwarding from an upstream interface of the node.

9. The storage system as claimed in claim 1 wherein the master controller can serve as a Direct Memory Access (DMA) engine.

10. A storage method comprising:

issuing a command in accordance with latency constraints, such that scheduling of buffered commands through a downstream interface of a master controller on a downstream communication path from said master controller to said plurality of nodes is configured to ensure that buffers of a plurality of nodes receiving commands are not exceeded by analyzing information sent from said master controller to said plurality of nodes via said downstream interface and by analyzing information received by said master controller from said plurality of nodes over an upstream communication path via an upstream interface, wherein said buffered commands are temporarily stored at said master controller, wherein said buffered commands are temporarily stored at said master controller, wherein communication between the master controller and the node has a determined maximum latency; and wherein a plurality of nodes including the node is coupled to the master controller in accordance with a chain memory configuration; and wherein said master controller is configured for tracking a state of a buffer count of said node when performing said analyzing information by decrementing said buffer count when a request that involves a response is forwarded to said node and incrementing said buffer count when a request response is received from said node;

performing a node receiving interface process on the command at a node; and

executing a node response process corresponding to the command if the command is targeted at the node.

11. The storage method of claim 10 wherein the node is one of a plurality of nodes organized in a chain configuration.

12. The storage method of claim 11 wherein the latency constraints include performing the issuing of a command so that total available read bandwidth of links of the plurality of node in the chain configuration is not exceeded and read buffer capacity of the plurality of nodes is not exceeded.

13. The storage method of claim 10 wherein the issuing a command is performed in accordance with characteristics of a targeted node without concern for a location of the node in a network or concern for characteristics of other nodes in the network.

14. The storage method of claim 10 wherein the performing a node receiving interface process comprises:

receiving the command from an external controller;

determining whether the node is the target of the command;

passing the node downstream if the node is not the target of the command; and

forwarding the command internally within the node if the node is the target of the command.

15. The storage method of claim 10 wherein executing a node response process comprises:

performing internal operations associated with the command; and

forwarding the results of the internal operations upstream in accordance with a conflict resolution process for handling conflicts with upstream information received from other nodes.

16. The storage method of claim 10 wherein executing a node response process comprises determining scheduling upstream communication priorities between information in an internal read buffer and an external read buffer according to a pre-determined algorithm for accessing the upstream communication bus by the internal read buffer and the external read buffer.

Assignments (7)
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
PARTIAL RELEASE OF SECURITY INTEREST IN PATENTS Recorded Aug 11, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 039708/0001 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
RELEASE OF SECURITY INTEREST Recorded Mar 13, 2015
From: BARCLAYS BANK PLC
To: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY LLC
Reel/Frame 035201/0159 →
SECURITY AGREEMENT Recorded Aug 6, 2010
From: SPANSION LLC; SPANSION INC.
To: BARCLAYS BANK PLC
Reel/Frame 024802/0054 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE PREVIOUSLY RECORDED ON REEL 024551 FRAME 0630. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNEE NAME FROM SPANSION LLC TO SPANSION LLC AND HITACHI, LTD.. Recorded Jul 7, 2010
From: ISAAC, ROGER DWAIN; MIURA, SEIJI
To: SPANSION LLC; HITACHI, LTD
Reel/Frame 024645/0279 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 17, 2010
From: ISAAC, ROGER DWAIN; MIURA, SEIJI
To: SPANSION LLC
Reel/Frame 024551/0630 →