Variable resistance element, semiconductor device, and method for manufacturing variable resistance element

1. A method for manufacturing a variable resistance element, comprising the steps of:

depositing a variable resistance material in a contact hole, which is formed on an interlayer insulating layer on a substrate and has a lower electrode at a bottom portion thereof, such that an upper surface of the variable resistance material in the contact hole is located lower than an upper surface of the interlayer insulating layer;

depositing an upper electrode material on the deposited variable resistance material such that an upper surface of the upper electrode material in the contact hole is located higher than the upper surface of the interlayer insulating layer; and

element-isolating by a CMP the variable resistance element including the variable resistance material and the upper electrode material which is stacked on the variable resistance material.

2. The method according to claim 1 , wherein the step of depositing the variable resistance material is carried out by MOD or MOCVD.

3. A method for manufacturing a variable resistance element, comprising the steps of:

forming a lower electrode film on a substrate;

etching the lower electrode film to form lower electrodes, each having a predetermined width such that the lower electrodes are arranged in a width direction of the lower electrode with predetermined pitches;

covering the lower electrodes with silicon oxide or silicon nitride to form an interlayer insulating layer;

patterning and etching the interlayer insulating layer to form contact holes, which are communicated with the lower electrodes;

depositing a variable resistance material by MOD or MOCVD such that an upper surface of the variable resistance material in the contact hole is located lower than an upper surface of the interlayer insulating layer;

depositing an upper electrode material on the deposited variable resistance material such that an upper surface of the upper electrode material in the contact hole is located higher than the upper surface of the interlayer insulating layer; and

element-isolating by a CMP the variable resistance element including the variable resistance material and the upper electrode material which is stacked on the variable resistance material.

4. A variable resistance element comprising:

a substrate;

a lower electrode formed on the substrate;

a variable resistance layer which is formed on the lower electrode and whose resistance value changes in accordance with an applied voltage pulse;

an upper electrode formed on the variable resistance layer; and

an insulating layer formed on the substrate, wherein:

the insulating layer is provided with a contact hole;

the variable resistance layer and the upper electrode are formed only below an upper end of the contact hole;

the upper electrode is formed to be convex toward the substrate; and

the variable resistance layer exists in an inner peripheral portion of the upper end in the contact hole whereas the upper electrode does not exist in this inner peripheral portion.

5. The variable resistance element according to claim 4 , wherein the convexity is only one.

6. The variable resistance element according to claim 4 , wherein the convex surface of the electrode projects such that a projection amount thereof toward the variable resistance layer continuously increases from a peripheral portion of the electrode to a central portion of the electrode.

7. The variable resistance element according to claim 4 , wherein in a cross section taken along a thickness direction of the variable resistance layer, a boundary formed by the convex surface is a bow-like curved shape.

8. The variable resistance element according to claim 4 , wherein the convex surface has a bowl shape.

9. The variable resistance element according to claim 4 , wherein a diode is formed on the substrate so as to be electrically connected to the lower electrode.

10. The variable resistance element according to claim 4 , wherein a field effect transistor is formed on the substrate so as to be electrically connected to the lower electrode.

11. A semiconductor device comprising a nonvolatile memory portion in which a plurality of the variable resistance elements according to claim 4 are formed in a matrix.

12. A semiconductor device formed by stacking nonvolatile memory portions, in each of which a plurality of the variable resistance elements according to claim 4 are formed in a matrix.