IP Library Granted Patent US 8,497,149
Granted Patent B2
US 8,497,149 · App. 12/280,669 · Granted Jul 30, 2013

MEMS device

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Quick Facts
Patent No.
US 8,497,149
App. No.
12/280,669
Granted
Jul 30, 2013
Kind
B2
Abstract

A method of fabricating a micro-electrical-mechanical system (MEMS) apparatus on a substrate ( 10 ) comprises the steps of processing the substrate ( 10 ) so as to fabricate an electronic circuit ( 11 ); depositing a first electrode ( 15 ) that is operably coupled with the electronic circuit ( 11 ); depositing a membrane ( 16 ) so that it is mechanically coupled to the first electrode ( 15 ); applying a sacrificial layer ( 50 ); depositing a structural layer ( 18 ) and a second electrode ( 17 ) that is operably coupled with the electronic circuit ( 11 ) so that the sacrificial layer ( 50 ) is disposed between the membrane ( 16 ) and the structural layer ( 18 ) so as to form a preliminary structure; singulating the substrate ( 10 ); and removing the sacrificial layer ( 50 ) so as to form a MEMS structure, in which the step of singulating the substrate ( 10 ) is carried out before the step of removing the sacrificial layer ( 50 ).

Claims (42)

1. A method of fabricating a plurality of micro-electrical-mechanical system (MEMS) device on a substrate, the method comprising the steps of:

processing the substrate so as to fabricate a plurality of electronic circuits;

depositing a plurality of first electrodes such that each first electrode is operably coupled with a respective electronic circuit;

depositing a plurality of membranes so that each membrane is mechanically coupled to a respective first electrode;

applying a plurality of sacrificial layers such that each sacrificial layer is deposited over a respective membrane;

depositing a plurality of structural layers and a plurality of second electrodes that are operably coupled with the electronic circuits so that the sacrificial layers are disposed between the respective membranes and the respective structural layers so as to form a preliminary structure;

singulating the substrate so as to form the plurality of separate MEMS devices, each MEMS device comprising a preliminary structure formed on a respective portion of the substrate; and

removing the sacrificial layer from the separate MEMS devices, in which the step of singulating the substrate is carried out before the step of removing the sacrificial layer.

2. A method according to claim 1 , in which the step of fabricating the electronic circuit is carried out using a complementary-metal-oxide-semiconductor (CMOS) process.

3. A method according to claim 1 , in which the sacrificial layer is polyimide.

4. A method according to claim 3 , comprising the step of removing the polyimide by a plasma oxygen etch process.

5. A method according to claim 4 , further comprising the step of exciting the plasma using microwaves.

6. A method according to claim 1 , comprising the step of applying a resist coat to the preliminary structure.

7. A method according to claim 6 , comprising the step of applying oxygen plasma etching to remove the resist coat.

8. A method according to claim 7 , further comprising the step of exciting the plasma using microwaves.

9. A method according to claim 1 , in which the step of singulating the substrate comprises cutting the substrate using a dicing saw.

10. A method according to claim 1 , in which the step of singulating the substrate comprises scribing the substrate and cleaving the substrate using mechanical force.

11. A method according to claim 1 , in which the step of singulating the substrate comprises cutting the substrate using laser dicing.

12. A method as claimed in claim 1 , comprising:

attaching the substrate to a carrier; and thereafter,

singulating the substrate.

13. A method as claimed in claim 12 , comprising:

attaching the substrate to the carrier using dicing tape.

14. A method as claimed in claim 13 , wherein the step of removing the sacrificial layer is performed after attaching the substrate to the carrier, and before singulating the substrate.

15. A method as claimed in claim 1 , further comprising:

before singulating the substrate, applying a resist coating layer; and

after singulating the substrate, removing the sacrificial layer and the resist coating layer in a single processing step.

16. A method as claimed in claim 15 , wherein the step of removing the sacrificial layer and the resist coating layer comprises using a dry etch process.

17. A method as claimed in claim 16 , wherein the step of removing the sacrificial layer comprises using an O 2 plasma.

18. A method according to claim 1 , in which the step of depositing the first electrode occurs during the step of fabricating the electronic circuit.

19. A method according to claim 1 , in which the electronic circuit comprises a pre-amplifier.

20. A method according to claim 1 , in which the electronic circuit comprises an analogue-to-digital converter.

21. A method according to claim 1 , in which the electronic circuit comprises a digital-to analogue converter.

22. A method according to claim 1 , in which the electronic circuit comprises transmitting and receiving means.

23. A method according to claim 1 , in which the electronic circuit comprises a charge-pump.

24. A method according to claim 1 , in which the electronic circuit comprises a digital signal processor.

25. A method according to claim 1 , comprising the step of etching a hole through the substrate so as to reveal the membrane.

26. A method according to claim 1 , in which the structural layer is a second membrane.

27. A method according to claim 26 , in which the second membrane is silicon nitride.

28. A method according to claim 1 , in which the first and the second electrodes are aluminum.

29. A method according to claim 1 , comprising the step of protecting the electronic circuit with an insulating and protecting layer.

30. A method according to claim 28 , in which the insulating and protecting layer is Silica.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 15, 2015
From: CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD.
To: CIRRUS LOGIC INC.
Reel/Frame 035909/0190 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 2, 2015
From: CIRRUS LOGIC INTERNATIONAL (UK) LTD.
To: CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD.
Reel/Frame 035806/0389 →
CHANGE OF NAME Recorded Apr 1, 2015
From: WOLFSON MICROELECTRONICS LTD
To: CIRRUS LOGIC INTERNATIONAL (UK) LTD.
Reel/Frame 035353/0413 →
CHANGE OF NAME Recorded Apr 1, 2015
From: WOLFSON MICROELECTRONICS PLC
To: WOLFSON MICROELECTRONICS LTD
Reel/Frame 035356/0096 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 24, 2008
From: LAMING, RICHARD IAN; TRAYNOR, ANTHONY
To: WOLFSON MICROELECTRONICS PLC
Reel/Frame 021882/0688 →