Frequency offset compensating apparatus and method, and optical coherent receiver

1. A frequency offset compensating apparatus for an optical coherent receiver including a front end processor and a frequency offset estimator, of which said front end processor converts an inputted optical signal into a base band digital electric signal, and said frequency offset estimator estimates a phase offset change introduced by a frequency offset in said base band digital electric signal;

said frequency offset compensating apparatus comprising:

an M output integrator, for integrating the phase offset change introduced by the frequency offset and estimated by said frequency offset estimator to acquire M inverse numbers of the phase offset introduced by the frequency offset, where M is an integer greater than 1;

a series-parallel converting device, for dividing said base band digital electric signal into M sub base band digital electric signals;

M complex multipliers, for constructing the corresponding inverse numbers in the M inverse numbers outputted by said M output integrator to be complex numbers, and multiplying them with the corresponding sub base band digital electric signals in the M sub base band digital electric signals converted by said series-parallel converting device; and

a parallel-series converting device, for converting the M sub base band digital electric signals multiplied by said complex multipliers into a base band electric signal.

2. The frequency offset compensating apparatus according to claim 1 , wherein said M output integrator comprises a multiplier, a delaying unit and M integrating units arranged in series, wherein

said multiplier multiplies the phase offset change introduced by the frequency offset and estimated by said frequency offset estimator with −1 to acquire an inverse number of the phase offset change introduced by the frequency offset, which inverse number is inputted into each of the integrating units;

each integrating unit in said M integrating units arranged in series integrates the inputted phase offset change to acquire a phase offset introduced by the frequency offset;

an integrating output of the last integrating unit in said M integrating units arranged in series is inputted into the corresponding complex multiplier and simultaneously outputted into said delaying unit, and integrating outputs of the remaining integrating units in said M integrating units arranged in series are inputted into the corresponding complex multipliers and simultaneously inputted into the next integrating unit; and

the first integrating unit in said M integrating units arranged in series integrates the inverse number and the integrating output of the last integrating unit having been delayed one symbol by said delaying unit.

3. The frequency offset compensating apparatus according to claim 2 , wherein each of said integrating units comprises an adder and a 2π modulo calculator arranged in series, the adder of the first integrating unit in said M integrating units arranged in series adds the inverse number to the integrating output of the last integrating unit having been delayed by said delaying unit, said 2π modulo calculator performs a 2π modulo calculation on the addition result of the adder; the adder of each of the integrating units other than the first integrating unit in said M integrating units arranged in series adds the inverse number to an output of the previous integrating unit, and said 2π modulo calculator performs a 2π modulo calculation on the addition result of the adder.

4. The frequency offset compensating apparatus according to claim 1 , wherein said M output integrator comprises a delaying unit and M integrating units arranged in parallel,

an output of said delaying unit is inputted into each of the integrating units in said M integrating units arranged in parallel;

each of the integrating units in said M integrating units arranged in parallel integrates the inputted phase offset change introduced by the frequency offset, outputs the phase offset introduced by the frequency offset of each symbol, namely integrating output, and respectively inputs the integrating output into the corresponding complex multiplier; and

the last integrating unit, namely the Mth integrating unit, in said M integrating units arranged in parallel further inputs its integrating output into said delaying unit, and said delaying unit delays the integrating output by one symbol as the output of said delaying unit to be inputted into each of the integrating units.

5. The frequency offset compensating apparatus according to claim 4 , wherein

each of the integrating units in said M integrating units arranged in parallel comprises a multiplier, an adder and a 2π modulo calculator, of which the multiplier of each integrating unit is respectively multiplied with −1 to −M;

the adder of each integrating unit adds the output of the multiplier to the output of the last integrating unit in said plurality of integrating units arranged in parallel; and the 2π modulo calculator of each integrating unit performs 2π modulo calculation on the addition result of the adder.

6. An optical coherent receiver, comprising

a front end processor, for changing an inputted optical signal into a base band electric signal,

a frequency offset estimator, for estimating a frequency offset in said base band electric signal; and

a frequency offset compensating apparatus for compensating a phase offset introduced by the frequency offset in said base band electric signal in accordance with the frequency offset estimated by said frequency offset estimator and comprising:

an M output integrator, for integrating the phase offset change introduced by the frequency offset and estimated by said frequency offset estimator to acquire M inverse numbers of the phase offset introduced by the frequency offset, where M is an integer greater than 1;

a series-parallel converting device, for dividing said base band digital electric signal into M sub base band digital electric signals;

M complex multipliers, for constructing the corresponding inverse numbers in the M inverse numbers outputted by said M output integrator to be complex numbers, and multiplying them with the corresponding sub base band digital electric signals in the M sub base band digital electric signals converted by said series-parallel converting device; and

a parallel-series converting device, for converting the M sub base band digital electric signals multiplied by said complex multipliers into a base band electric signal.

7. The optical coherent receiver according to claim 6 , characterized in further comprising:

a coarse frequency offset compensating unit, for coarsely compensating the frequency offset of the base band electric signal outputted by said front end processor;

wherein said frequency offset estimator estimates the frequency offset of the base band electric signal having been coarsely compensated by said coarse frequency offset compensating unit.

8. The optical coherent receiver according to claim 6 ,

wherein said optical coherent receiver further comprises a digital equalizer and an integrator;

wherein said front end processor is connected to said frequency offset compensating apparatus, and said frequency offset compensating apparatus is connected to said digital equalizer;

said digital equalizer equalizes the base band electric signal having been compensated by said frequency offset compensating apparatus, and inputs the equalized signal into said frequency offset estimator;

said frequency offset estimator estimates the frequency offset in the signal outputted by said digital equalizer, and outputs the frequency offset into said integrator; and

said integrator integrates the frequency offset, and outputs the integrated signal into said frequency offset compensating apparatus.