ESD protection for bipolar-CMOS-DMOS integrated circuit devices
View Patent ↗An Electro-Static Discharge (ESD) protection device is formed in an isolated region of a semiconductor substrate. The ESD protection device may be in the form of a MOS or bipolar transistor or a diode. The isolation structure may include a deep implanted floor layer and one or more implanted wells that laterally surround the isolated region. The isolation structure and ESD protection devices are fabricated using a modular process that includes virtually no thermal processing. Since the ESD device is isolated, two or more ESD devices may be electrically “stacked” on one another such that the trigger voltages of the devices are added together to achieve a higher effective trigger voltage.
1. An isolated ESD protection device, the device being connected between input terminals of a circuit to be protected, both the device and the circuit being formed in a semiconductor substrate of a first conductivity type, the device comprising:
a floor isolation layer of a second conductivity type;
multiple parallel N-type wells alternating with parallel P-type wells, each of said N-type and said P-type wells extending downward from a surface of said substrate to said floor isolation layer;
a cathode contact in electrical contact with each of said N-type wells;
an anode contact in electrical contact with each of said P-type wells;
a field oxide layer at said surface of said substrate surrounding said N-type and said P-type wells; and
a heavily-doped substrate ring of said first conductivity type at said surface of said substrate surrounding said field oxide layer, a doping concentration of said heavily-doped substrate ring being greater than a doping concentration of a portion of said substrate abutting said heavily-doped substrate ring.
2. The isolated ESD protection device of claim 1 wherein each of said N-type wells includes a surface layer and a subsurface layer, said subsurface layer being located directly below said surface layer, a doping concentration of said subsurface layer being greater than a doping concentration of said surface layer.
3. The isolated ESD protection device of claim 1 wherein each of said P-type wells includes a surface layer and a subsurface layer, said subsurface layer being located directly below said surface layer, a doping concentration of said subsurface layer being greater than a doping concentration of said surface layer.
4. The isolated ESD protection device of claim 3 wherein each of said N-type wells includes a second surface layer and a second subsurface layer, said second subsurface layer being located directly below said second surface layer, a doping concentration of said second subsurface layer being greater than a doping concentration of said second surface layer.
5. The isolated ESD protection device of claim 1 further comprising an interlayer dielectric overlying said surface of said substrate, said anode contact being in physical contact with each of said P-type wells through a first opening in said interlayer dielectric, said cathode contact being in physical contact with each of said N-type wells through a second opening in said interlayer dielectric.
6. The isolated ESD protection device of claim 1 further comprising an interlayer dielectric overlying said surface of said substrate and a substrate contact including a metal layer, said substrate contact being in physical contact with said heavily-doped substrate ring through an opening in said interlayer dielectric.
7. An isolated ESD protection device, the device being connected between input terminals of a circuit to be protected, both the device and the circuit being formed in a semiconductor substrate of a first conductivity type, the device comprising:
a floor isolation layer of a second conductivity type;
multiple parallel N-type wells alternating with parallel P-type wells, each of said N-type and said P-type wells extending downward from a surface of said substrate to said floor isolation layer, each of said N-type wells including a surface layer and a subsurface layer, said subsurface layer being located directly below said surface layer, a doping concentration of said subsurface layer being greater than a doping concentration of said surface layer;
a cathode contact in electrical contact with each of said N-type wells; and
an anode contact in electrical contact with each of said P-type wells.
8. The isolated ESD protection device of claim 7 wherein each of said P-type wells includes a surface layer and a subsurface layer, said subsurface layer being located directly below said surface layer, a doping concentration of said subsurface layer being greater than a doping concentration of said surface layer.
9. The isolated ESD protection device of claim 7 further comprising an interlayer dielectric overlying said surface of said substrate, said anode contact being in physical contact with each of said P-type wells through a first opening in said interlayer dielectric, said cathode contact being in physical contact with each of said N-type wells through a second opening in said interlayer dielectric.
10. The isolated ESD protection device of claim 9 wherein said anode contact includes a first barrier metal layer being in physical contact with each of said P-type wells and a first metal layer in physical contact with said first barrier metal layer, said cathode contact including a second barrier metal layer being in physical contact with each of said N-type wells and a second metal layer in physical contact with said second barrier metal layer.
11. The isolated ESD protection device of claim 7 further comprising a field oxide layer at said surface of said substrate surrounding said N-type and said P-type wells.
12. The isolated ESD protection device of claim 11 further comprising a heavily-doped substrate ring of said first conductivity type at said surface of said substrate surrounding said field oxide layer, a doping concentration of said heavily-doped substrate ring being greater than a doping concentration of a portion of said substrate abutting said heavily-doped substrate ring.
13. The isolated ESD protection device of claim 12 further comprising an interlayer dielectric overlying said surface of said substrate and a substrate contact including a metal layer, said substrate contact being in physical contact with said heavily-doped substrate ring through an opening in said interlayer dielectric.
14. An isolated ESD protection device, the device being connected between input terminals of a circuit to be protected, both the device and the circuit being formed in a semiconductor substrate of a first conductivity type, the device comprising:
a floor isolation layer of a second conductivity type;
multiple parallel N-type wells alternating with parallel P-type wells, each of said N-type and said P-type wells extending downward from a surface of said substrate to said floor isolation layer, each of said P-type wells including a surface layer and a subsurface layer, said subsurface layer being located directly below said surface layer, a doping concentration of said subsurface layer being greater than a doping concentration of said surface layer;
a cathode contact in electrical contact with each of said N-type wells; and
an anode contact in electrical contact with each of said P-type wells.
15. The isolated ESD protection device of claim 14 wherein each of said N-type wells includes a surface layer and a subsurface layer, said subsurface layer being located directly below said surface layer, a doping concentration of said subsurface layer being greater than a doping concentration of said surface layer.
16. The isolated ESD protection device of claim 14 further comprising an interlayer dielectric overlying said surface of said substrate, said anode contact being in physical contact with each of said P-type wells through a first opening in said interlayer dielectric, said cathode contact being in physical contact with each of said N-type wells through a second opening in said interlayer dielectric.
17. The isolated ESD protection device of claim 16 wherein said anode contact includes a first barrier metal layer being in physical contact with each of said P-type wells and a first metal layer in physical contact with said first barrier metal layer, said cathode contact including a second barrier metal layer being in physical contact with each of said N-type wells and a second metal layer in physical contact with said second barrier metal layer.
18. The isolated ESD protection device of claim 14 further comprising a field oxide layer at said surface of said substrate surrounding said N-type and said P-type wells.
19. The isolated ESD protection device of claim 18 further comprising a heavily-doped substrate ring of said first conductivity type at said surface of said substrate surrounding said field oxide layer, a doping concentration of said heavily-doped substrate ring being greater than a doping concentration of a portion of said substrate abutting said heavily-doped substrate ring.
20. The isolated ESD protection device of claim 19 further comprising an interlayer dielectric overlying said surface of said substrate and a substrate contact including a metal layer, said substrate contact being in physical contact with said heavily-doped substrate ring through an opening in said interlayer dielectric.