Semiconductor device and method for manufacturing the same

1. A method for manufacturing a semiconductor device comprising a Fin field effect transistor, the method comprising a sequence of step comprising:

(1) preparing a semiconductor substrate;

(2) forming an oxide film on a surface of the semiconductor substrate;

(3) forming an isolation region in the semiconductor substrate;

(4) forming a mask pattern on the entire semiconductor substrate except for the isolation region;

(5) etching the oxide film away through the mask pattern as a mask to expose the semiconductor substrate;

(6) forming a sacrifice oxide film on a part of the semiconductor substrate exposed in (5);

(7) implanting impurity into the semiconductor substrate through the mask pattern as a mask;

(8) removing the sacrifice oxide film to expose the semiconductor substrate;

(9) forming a gate insulating film on the exposed semiconductor substrate;

(10) forming a polysilicon film on the gate insulating film;

(11) performing a CMP process on the polysilicon film through the mask pattern as a stopper;

(12) forming a metal film on the polysilicon film;

(13) reacting at least a part of the metal film with at least a part of the polysilicon film to silicidize the metal to form a gate electrode of said Fin field effect transistor;

(14) removing the mask pattern; and

(15) implanting impurity into the opposite sides of the semiconductor substrate across the gate electrode to form a source/drain region.

2. The method for manufacturing a semiconductor device according to claim 1 ,

wherein the semiconductor substrate is a silicon semiconductor substrate, and in (7), B, P, As, or BF 2 is implanted as the impurity.

3. The method for manufacturing a semiconductor device according to claim 1 ,

wherein the metal is W, and

in (13), a part of the W film are reacted with a part of the polysilicon film to silicidize the W to form the gate electrode of a laminate structure with the W layer, WSi layer, and polysilicon layer laminated in this order from above.

4. The method for manufacturing a semiconductor device according to claim 1 ,

wherein the mask pattern comprise silicon nitride.

5. The method for manufacturing a semiconductor device comprising a plurality of the Fin field effect transistors according to claim 1 ,

wherein in (13), a plurality of the gate electrodes are formed, and

in (15), a plurality of the source/drain regions are formed.

6. A method for manufacturing a semiconductor device comprising a Fin field effect transistor, the method comprising a sequence of step comprising:

(1) preparing a structure comprising a semiconductor substrate and an isolation region in the semiconductor substrate;

(2) forming a mask pattern on the entire semiconductor substrate except for the isolation region;

(3) forming a sacrifice oxide film on an exposed part of the semiconductor substrate which is not covered by a mask constituting the mask pattern;

(4) implanting impurity into the semiconductor substrate through the mask pattern as a mask;

(5) removing the sacrifice oxide film to expose the semiconductor substrate;

(6) forming a gate insulating film on the exposed part of the semiconductor substrate;

(7) forming a polysilicon film on the gate insulating film;

(8) performing a CMP process on the polysilicon film through the mask pattern as a stopper;

(9) forming a metal film on the polysilicon film;

(10) reacting the metal film with the polysilicon film to silicidize the metal to form a gate electrode of said Fin field effect transistor;

(11) removing the mask pattern; and

(12) implanting impurity into the opposite sides of the semiconductor substrate across the gate electrode to form a source/drain region.

7. The method for manufacturing a semiconductor device according to claim 6 ,

wherein the semiconductor substrate is a silicon semiconductor substrate, and in (4), B, P, As, or BF 2 is implanted as the impurity.

8. The method for manufacturing a semiconductor device according to claim 6 ,

wherein the metal is W, and

in (10), a part of the W film are reacted with a part of the polysilicon film to silicidize the W to form the gate electrode of a laminate structure with the W layer, WSi layer, and polysilicon layer laminated in this order from above.

9. The method for manufacturing a semiconductor device according to claim 6 ,

wherein the mask pattern comprise silicon nitride.

10. The method for manufacturing a semiconductor device compositing a plurality of the Fin field effect transistors according to claim 6 ,

wherein in (10), a plurality of the gate electrodes are formed, and

in (12), a plurality of the source/drain regions are formed.

11. A method for manufacturing a semiconductor device comprising a Fin field effect transistor, the method comprising a sequence of step comprising:

(1) preparing a projecting semiconductor region extending in a predetermined direction;

(2) forming a sacrifice oxide film on an intermediate portion of the semiconductor region in the predetermined direction;

(3) implanting impurity into a part of the semiconductor region under the sacrifice oxide film;

(4) removing the sacrifice oxide film to expose the semiconductor region;

(5) forming a gate insulating film on the exposed part of the semiconductor region;

(6) forming a polysilicon film and a metal film in order on the gate insulating film;

(7) reacting the metal film with the polysilicon film to silicidize the metal to form a gate electrode of said Fin field effect transistor; and

(8) implanting impurity into the opposite sides of the semiconductor region across the gate electrode in the predetermined direction to form a source/drain region.

12. The method for manufacturing a semiconductor device according to claim 11 ,

wherein the semiconductor region is a silicon semiconductor region, and in (3), B, P, As, or BF 2 is implanted as the impurity.

13. The method for manufacturing a semiconductor device according to claim 11 ,

wherein the metal is W, and

in (7), a part of the W film are reacted with a part of the polysilicon film to silicidize the W to form the gate electrode of a laminate structure with the W layer, WSi layer, and polysilicon layer laminated in this order from above.

14. The method for manufacturing a semiconductor device compositing a plurality of the Fin field effect transistors according to claim 11 ,

wherein in (7), a plurality of the gate electrodes are formed, and

in (9), a plurality of the source/drain regions are formed.