A micro-electrical-mechanical device comprises: a transducer arrangement having at least a membrane being mounted with respect to a substrate; and electrical interface means for relating electrical signals to movement of the membrane; in which the transducer arrangement comprises stress alleviating formations which at least partially decouple the membrane from expansion or contraction of the substrate.
1. A micro-electrical-mechanical device comprising:
a transducer arrangement comprising a membrane and a substrate;
electrical interface means for relating electrical signals to movement of the membrane;
a substrate hole formed through the substrate, across which the membrane is suspended; and
a stress release region comprising stress alleviating formations within the perimeter of the membrane which at least partially decouple the membrane from expansion or contraction of the substrate, wherein the stress alleviating formations comprise holes or trenches in the membrane, wherein the membrane is mounted with respect to the substrate such that the stress release region at least partially overlaps with the substrate so as to damp air flow through the membrane and the substrate hole formed in the substrate via a perimeter cavity formed below the stress release region.
2. A device according to claim 1 , wherein the transducer arrangement further comprises a back-plate arrangement having another electrical interface means for relating electrical signals to the movement of the membrane, the back-plate arrangement being positioned so as to form a cavity between the back-plate arrangement and the membrane.
3. A device according to claim 2 , in which the cavity is formed by removal of a sacrificial layer.
4. A device according to claim 3 , in which the sacrificial layer is polyimide.
5. A device according to claim 3 , in which the sacrificial layer is low temperature silica.
6. A device according to claim 3 , in which the removal of the sacrificial layer is carried out using dry etching.
7. A device according to claim 6 , wherein said dry etching comprises oxygen plasma etching.
8. A device according to claim 7 , in which the plasma is partially induced by microwaves.
9. A device according to claim 3 , in which the removal of a sacrificial layer is carried out using high temperature direct wafer heating and a nitrogen doped oxygen plasma.
10. A device according to claim 2 , in which the back-plate arrangement is perforated so as to allow a passage of air through it.
11. A device according to claim 1 , in which the stress alleviating formations are disposed substantially between the transducer arrangement and the substrate.
12. A device according to claim 11 , in which a stiffness of the stress alleviating formations substantially perpendicular to the substrate is greater than a stiffness of the stress alleviating formations substantially in the plane of the substrate.
13. A device according to claim 1 , in which the device is fabricated in a process in which the temperature does not exceed 400° C.
14. A device according to claim 1 , in which the membrane is silicon nitride.
15. A device according to claim 1 , in which the electrical interface means comprise one or more materials selected from the list consisting of: Al, A 1 Si; AlSiCu; Ti, TiW; Cu, Ni, NiCr; Pt, Ta, and Pd.
16. A device according to claim 1 , in which the substrate is silicon.
17. A MEMS microphone comprising a device according to claim 1 .
18. A MEMS pressure sensor comprising a device according to claim 1 .
19. A MEMS ultrasonic transducer comprising a device according to claim 1 .
20. An array of MEMS devices disposed upon an integrated circuit substrate, the devices being operably connected and the devices being selected from a list comprising:
a MEMS microphone comprising a device according to claim 1 ;
a MEMS pressure sensor comprising a device according to claim 1 ; and
a MEMS ultrasonic transducer comprising a device according to claim 1 .
21. A device according to claim 20 , wherein the integrated circuit substrate is the same as the substrate.
22. An integrated circuit substrate on which an electronic circuit operably connected to the device according to claim 1 is formed.
23. A device according to claim 22 , wherein the integrated circuit substrate is the same as the substrate.
24. A packaged integrated circuit arrangement comprising the integrated circuit substrate according to claim 22 , mounted in an integrated circuit package.
25. A device according to claim 1 , the device further comprising a covering layer which covers one or more of said holes or trenches in the membrane.