IP Library Granted Patent US 8,335,956
Granted Patent B2
US 8,335,956 · App. 12/295,828 · Granted Dec 18, 2012

Packet retransmission and memory sharing

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Quick Facts
Patent No.
US 8,335,956
App. No.
12/295,828
Granted
Dec 18, 2012
Kind
B2
Abstract

Through the identification of different packet-types, packets can be handled based on an assigned packet handling identifier. This identifier can, for example, enable forwarding of latency-sensitive packets without delay and allow error-sensitive packets to be stored for possible retransmission. In another embodiment, and optionally in conjunction with retransmission protocols including a packet handling identifier, a memory used for retransmission of packets can be shared with other transceiver functionality such as, coding, decoding, interleaving, deinterleaving, error correction, and the like.

Claims (79)

1. A method comprising:

transmitting to another transceiver or receiving from another transceiver a message, the message indicating how memory is to be allocated in a transceiver; and

sharing the memory between one or more of interleaving and deinterleaving functions and a packet retransmission functions based on the message.

2. The method of claim 1 , further comprising transmitting or receiving a message indicating how to share the memory.

3. A method comprising:

transmitting to another transceiver or receiving from another transceiver a message, the message indicating how shared memory is to be allocated in a transceiver; and

allocating a first portion of the shared memory for retransmission and a second portion of the shared memory for one or more of interleaving and deinterleaving.

4. The method of claim 3 , further comprising transmitting or receiving a message indicating how to allocate the shared memory.

5. A shared memory in a transceiver capable of being shared between one or more of an interleaving and a deinterleaving buffer and a packet retransmission buffer based on a message which indicates how memory is to be shared in the transceiver.

6. A module in a transceiver capable of allocating a first portion of shared memory for retransmission and a second portion of the shared memory for one or more of interleaving and deinterleaving based on a message which indicates how memory is to be shared in the transceiver.

7. The module of claim 6 , wherein the module is capable of transmitting or receiving a message indicating how to allocate the shared memory.

8. The module of claim 6 , wherein the module is capable of transmitting or receiving a message indicating how to share the memory.

9. The module of claim 6 , wherein the module is one or more of a wireless transceiver, a wireless LAN (Local Area Network) station, a wired transceiver, a DSL (Digital Subscriber Line) modem, an ADSL (Asymmetric Digital Subscriber Line) modem, an xDSL modem, a VDSL (Very-high-bit-rate Digital Subscriber Line) modem, a multicarrier transceiver, a general purpose computer, a special purpose computer, a programmed microprocessor, a microcontroller and peripheral integrated circuit element(s), an ASIC (Application Specific Integrated Circuit), a digital signal processor, a hard-wired electronic or logic circuit and a programmable logic device.

10. A method to share memory between an interleaving function and a packet retransmission function in a transceiver comprising:

transmitting, by the transceiver, to another transceiver or receiving from another transceiver, a message indicating:

an amount of the shared memory is to be allocated to the interleaver function, and

an amount of the shared memory is to be allocated to the packet retransmission function;

allocating a first portion of the shared memory to the interleaving function; and

allocating a second portion of the shared memory to the packet retransmission function, wherein the first allocated portion of the shared memory is no more than the amount of memory indicated in the message for the interleaving function and the second allocated portion of the shared memory is no more than the amount of memory indicated in the message for the retransmission function.

11. The method of claim 10 , wherein the allocating of memory to the interleaving function is based on one or more of an error correction capability, latency, buffering requirements, SNR (Signal-to-Noise Ratio) and impulse noise.

12. The method of claim 10 , wherein the allocating of memory to the retransmission function is based on one or more of an error correction capability, latency, buffering requirements, SNR and impulse noise.

13. A method to share memory between a deinterleaving function and a packet retransmission function in a transceiver comprising:

transmitting, by the transceiver, to another transceiver or receiving from another transceiver a message indicating:

an amount of the memory is to be allocated to the deinterleaver function, and

an amount of the shared memory is to be allocated to the packet retransmission function;

allocating a first portion of the shared memory to the deinterleaving function; and

allocating a second portion of the shared memory to the packet retransmission function, wherein the first allocated portion of the shared memory is no more than the amount of memory indicated in the message for the deinterleaving function and the second allocated portion of the shared memory is no more than the amount of memory indicated in the message for the retransmission function.

14. The method of claim 13 , wherein the allocating of memory to the deinterleaving function is based on one or more of an error correction capability, latency, buffering requirements, SNR (Signal-to-Noise Ratio) and impulse noise.

15. The method of claim 14 , wherein the allocating of memory to the retransmission function is based on one or more of an error correction capability, latency, buffering requirements, SNR (Signal-to-Noise Ratio) and impulse noise.

16. A system for sharing memory between an interleaving function and a packet retransmission function in a transceiver comprising:

means for transmitting to another transceiver or receiving from another transceiver a message indicating:

an amount of the shared memory is to be allocated to the interleaver function, and

an amount of the shared memory is to be allocated to the packet retransmission function;

means for allocating a first portion of the shared memory to the interleaving function; and

means for allocating a second portion of the shared memory to the packet retransmission function, wherein the first allocated portion of the shared memory is no more than the amount of memory indicated in the message for the interleaving function and the second allocated portion of the shared memory is no more than the amount of memory indicated in the message for the retransmission function.

17. The system of claim 16 , wherein the allocating of memory to the interleaving function is based on one or more of an error correction capability, latency, buffering requirements, SNR (Signal-to-Noise Ratio) and impulse noise.

18. The system of claim 16 , wherein the allocating of memory to the retransmission function is based on one or more of an error correction capability, latency, buffering requirements, SNR and impulse noise.

19. A system for sharing memory between a deinterleaving function and a packet retransmission function in a transceiver comprising:

means for transmitting to another transceiver or receiving from another transceiver a message indicating:

an amount of the memory is to be allocated to the deinterleaver function, and

an amount of the shared memory is to be allocated to the packet retransmission function;

means for allocating a first portion of the shared memory to the deinterleaving function; and

means for allocating a second portion of the shared memory to the packet retransmission function, wherein the first allocated portion of the shared memory is no more than the amount of memory indicated in the message for the deinterleaving function and the second allocated portion of the shared memory is no more than the amount of memory indicated in the message for the retransmission function.

20. The system of claim 19 , wherein the allocating of memory to the deinterleaving function is based on one or more of an error correction capability, latency, buffering requirements, SNR (Signal-to-Noise Ratio) and impulse noise.

21. The system of claim 19 , wherein the allocating of memory to the retransmission function is based on one or more of an error correction capability, latency, buffering requirements, SNR and impulse noise.

22. A non-transitory computer-readable information storage media having stored thereon instructions, that when executed by a processor, cause to be performed a method for sharing memory between an interleaving function and a packet retransmission function in a transceiver comprising:

transmitting, by the transceiver, to another transceiver or receiving from another transceiver, a message indicating:

an amount of the shared memory is to be allocated to the interleaver function, and

an amount of the shared memory is to be allocated to the packet retransmission function;

allocating a first portion of the shared memory to the interleaving function; and

allocating a second portion of the shared memory to the packet retransmission function, wherein the first allocated portion of the shared memory is no more than the amount of memory indicated in the message for the interleaving function and the second allocated portion of the shared memory is no more than the amount of memory indicated in the message for the retransmission function.

23. The media of claim 22 , wherein the allocating of memory to the interleaving function is based on one or more of an error correction capability, latency, buffering requirements, SNR (Signal-to-Noise Ratio) and impulse noise.

24. The media of claim 22 , wherein the allocating of memory to the retransmission function is based on one or more of an error correction capability, latency, buffering requirements, SNR and impulse noise.

25. A non-transitory computer-readable information storage media having stored thereon instructions, that when executed by a processor, cause to be performed a method for sharing memory between a deinterleaving function and a packet retransmission function in a transceiver comprising:

transmitting, by the transceiver, to another transceiver or receiving from another transceiver, a message indicating:

an amount of the memory is to be allocated to the deinterleaver function, and

an amount of the shared memory is to be allocated to the packet retransmission function;

allocating a first portion of the shared memory to the deinterleaving function; and

allocating a second portion of the shared memory to the packet retransmission function, wherein the first allocated portion of the shared memory is no more than the amount of memory indicated in the message for the deinterleaving function and the second allocated portion of the shared memory is no more than the amount of memory indicated in the message for the retransmission function.

26. The media of claim 25 , wherein the allocating of memory to the deinterleaving function is based on one or more of an error correction capability, latency, buffering requirements, SNR (Signal-to-Noise Ratio) and impulse noise.

27. The media of claim 25 , wherein the allocating of memory to the retransmission function is based on one or more of an error correction capability, latency, buffering requirements, SNR and impulse noise.

28. A system to share memory between an interleaving function and a packet retransmission function comprising:

a transceiver capable of:

transmitting to another transceiver or receiving from another transceiver a message indicating:

an amount of the shared memory is to be allocated to the interleaver function, and

an amount of the shared memory is to be allocated to the packet retransmission function;

allocating a first portion of the shared memory to the interleaving function; and

allocating a second portion of the shared memory to the packet retransmission function, wherein the first allocated portion of the shared memory is no more than the amount of memory indicated in the message for the interleaving function and the second allocated portion of the shared memory is no more than the amount of memory indicated in the message for the retransmission function.

29. The system of claim 28 , wherein the allocating of memory to the interleaving function is based on one or more of an error correction capability, latency, buffering requirements, SNR (Signal-to-Noise Ratio) and impulse noise.

30. The system of claim 28 , wherein the allocating of memory to the retransmission function is based on one or more of an error correction capability, latency, buffering requirements, SNR and impulse noise.

31. A system to share memory between a deinterleaving function and a packet retransmission function comprising:

a transceiver capable of:

transmitting to another transceiver or receiving from another transceiver a message indicating:

an amount of the memory is to be allocated to the deinterleaver function, and

an amount of the shared memory is to be allocated to the packet retransmission function;

allocating a first portion of the shared memory to the deinterleaving function; and

allocating a second portion of the shared memory to the packet retransmission function, wherein the first allocated portion of the shared memory is no more than the amount of memory indicated in the message for the deinterleaving function and the second allocated portion of the shared memory is no more than the amount of memory indicated in the message for the retransmission function.

32. The system of claim 31 , wherein the allocating of memory to the deinterleaving function is based on one or more of an error correction capability, latency, buffering requirements, SNR (Signal-to-Noise Ratio) and impulse noise.

33. The system of claim 31 , wherein the allocating of memory to the retransmission function is based on one or more of an error correction capability, latency, buffering requirements, SNR and impulse noise.

Assignments (4)
AMENDED AND RESTATED INTELLECTUAL PROPERTY SECURITY AGREEMENT Recorded Jan 4, 2021
From: TQ DELTA LLC
To: ALTER DOMUS (US) LLC
Reel/Frame 054898/0850 →
SECURITY INTEREST Recorded Oct 10, 2018
From: TQ DELTA, LLC
To: DLI LENDING AGENT, LLC
Reel/Frame 047212/0551 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 18, 2012
From: AWARE, INC.
To: TQ DELTA, LLC
Reel/Frame 029154/0937 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 30, 2008
From: TZANNES, MARCOS C.
To: AWARE, INC.
Reel/Frame 021765/0805 →