IP Library Granted Patent US 9,224,331
Granted Patent B2
US 9,224,331 · App. 12/298,140 · Granted Dec 29, 2015

Organic electroluminescent display

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Quick Facts
Patent No.
US 9,224,331
App. No.
12/298,140
Granted
Dec 29, 2015
Kind
B2
Abstract

An organic light-emitting display screen includes n×m picture dots organized in a matrix with m rows and n columns. Each picture dot includes an organic diode and first and second driver circuits for the diode. Each of the first and second driver circuits includes a driving transistor connected between a reference voltage and one electrode of the diode, a switching transistor for switching a gate voltage onto a gate of the driving transistor, and a capacitor connected to the gate of the driving transistor. A circuit for addressing each of the n×m picture dots, to control alternately and simultaneously a recovery phase on one driver circuit and a display phase on the other driver circuit of a picture dot, includes as row select lines, only m row select lines, one per row of picture dots, and/or as data lines, only n data lines, one per column of picture dots.

Claims (29)

1. An organic light-emitting display screen, comprising:

n×m picture dots organized in a matrix with m rows and n columns, m and n being integers greater than or equal to 1;

a circuit for addressing the n×m picture dots, including m row select lines, the picture dots of a given row being connected to a respective row select line among said m row select lines for selection of said given row and to another row select line among said m row select lines, said another row select line configured for selection of another row of picture dots;

n data lines, one for each of the n columns of picture dots, to apply a video voltage to a picture dot of a respective column and a currently selected row; and

each picture dot including an organic electroluminescent (OLED) diode and first and second driver circuits for the OLED,

each of the first and second driver circuits including:

a driving transistor connected between a reference voltage and one electrode of the OLED,

a switching transistor for connecting data line of the respective column to a gate of the driving transistor,

an additional transistor for applying a turn-off voltage onto the gate of the driving transistor, and

a capacitor connected to the gate of the driving transistor and the reference voltage, to maintain a gate voltage, wherein

said respective row select line for the picture dot is connected to a gate of the switching transistor of the first driver circuit and to a gate of the additional transistor of the second driver circuit,

said another row select line for the picture dot is connected to a gate of the switching transistor of the second driver circuit and to a gate of the additional transistor of the first driver circuit, and

the circuit for addressing each of the n×m picture dots sequentially selects each of successive row select lines from top to bottom of the matrix during one frame and from bottom to top during a next frame such that only one row select line is selected at any given time,

during a first frame said respective row select line is selected before said another row select line is subsequently selected, wherein during the first frame

the driving transistor of the first driver circuit is put into a display phase when said respective row select line is selected and before said another row select line is subsequently selected and is put into a recovery phase when said another row select line is selected, and

the driving transistor of the second driver circuit is put into the recovery phase when said respective row select line is selected and before said another row select line is subsequently selected and is put into the display phase when said another row select line is selected, and

during a second frame subsequent to the first frame, said another row select line is selected before said respective row select line is subsequently selected, wherein during the second frame

the driving transistor of the first driver circuit is put into the recovery phase when said another row select line is selected and before said respective row select line is subsequently selected and is put into the display phase when said respective row select line is selected, and

the driving transistor of the second driver circuit is put into the display phase when said another row select line is selected and before said respective row select line is subsequently selected and is put into the recovery phase when said respective row select line is selected.

2. The display screen according to claim 1 , wherein the additional transistor is connected between the gate of the driving transistor and a select line connected to the gate of the switching transistor in each of the first and second driver circuits, one of the first driver circuit and the second driver circuit is controlled on the gate of the additional transistor by the select line connected to the gate of the switching transistor of another one of the first driver circuit and the second driver circuit, and an order of a sequential selection of the successive row select lines of the display screen is alternately reversed at each frame.

3. The display screen according to claim 1 , wherein the circuit for addressing comprises a row driver and a column driver used in liquid crystal displays for controlling the m row select lines and the n data lines.

4. The display screen according to claim 2 , wherein each column of the n×m picture dots includes one of the n data lines.

5. The display screen according to claim 1 , wherein said given row of picture dots and said another row of pictures dots are adjacent.

6. The display screen according to claim 1 , wherein when the driving transistor of the second driver circuit is put into the display phase, the gate of driving transistor of the second driver circuit is supplied with an ON voltage, and wherein when the driving transistor of the second driver circuit is put into the recovery phase, the gate of driving transistor of the second driver circuit is supplied with an OFF voltage.

7. The display screen according to claim 6 , wherein the OFF voltage is a predetermined fixed voltage.

8. The display screen according to claim 6 , wherein the OFF voltage is a voltage that is variable from one pixel to another and is a function of the video voltage applied to the picture dot.

9. The display screen according to claim 1 , wherein

during the first frame when said respective row select line is selected and before said another row select line is subsequently selected, the switching transistor of the second driver circuit and the additional transistor of the second driver circuit are put in OFF and ON states, respectively, and the switching transistor of the first driver circuit and the additional transistor of the first driver circuit are put in ON and OFF states, respectively, and when said another row select line is subsequently selected, the switching transistor of the second driver circuit and the additional transistor of the second driver circuit are put in ON and OFF states, respectively, and the switching transistor of the first driver circuit and the additional transistor of the first driver circuit are put in OFF and ON states, respectively,

during the second frame when said another row select line is selected and before said respective row select line is subsequently selected, the switching transistor of the second driver circuit and the additional transistor of the second driver circuit are put in ON and OFF states, respectively, and the switching transistor of the first driver circuit and the additional transistor of the first driver circuit are put in OFF and ON states, respectively, and when said respective row select line is subsequently selected, the switching transistor of the second driver circuit and the additional transistor of the second driver circuit are put in OFF and ON states, respectively, and the switching transistor of the first driver circuit and the additional transistor of the first driver circuit are put in ON and OFF states, respectively.

Assignments (4)
CORRECTIVE ASSIGNMENT TO CORRECT THE RECEIVING PARTY NAME FROM INTERDIGITAL CE PATENT HOLDINGS TO INTERDIGITAL CE PATENT HOLDINGS, SAS. PREVIOUSLY RECORDED AT REEL: 47332 FRAME: 511. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Feb 28, 2024
From: THOMSON LICENSING
To: INTERDIGITAL CE PATENT HOLDINGS, SAS
Reel/Frame 066703/0509 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 26, 2018
From: THOMSON LICENSING
To: INTERDIGITAL CE PATENT HOLDINGS
Reel/Frame 047332/0511 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 15, 2014
From: THALES
To: THOMSON LICENSING (S.A.S.)
Reel/Frame 034507/0450 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 30, 2008
From: KRETZ, THIERRY; LEBRUN, HUGUES; CHUITON, ELISABETH
To: THALES
Reel/Frame 021760/0211 →