IP Library Patent Application 12305890
Patent Application
App. No. 12/305,890

SEMICONDUCTOR DEVICE

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Quick Facts
Patent No.
US None
App. No.
12/305,890
Abstract

In a phase-change memory, an interface layer is inserted between a chalcogenide material layer and a plug. The interface layer is arranged so as not to cover the entire interface of a plug-like electrode. When the plug is formed at an upper part than the chalcogenide layer, the degree of integration is increased. The interface layer is formed by carrying out sputtering using an oxide target, or, by forming a metal film by carrying out sputtering using a metal target followed by oxidizing the metal film in an oxidation atmosphere such as oxygen radical, oxygen plasma, etc.

Claims (35)

1 . A semiconductor device comprising at least:

a semiconductor substrate;

a transistor formed on a main surface of the semiconductor substrate;

an interlayer insulating film provided above the transistor;

an electrode electrically connected to the transistor;

a chalcogenide material layer provided to the electrode so as to be in contact with the electrode or via another layer;

an interface layer provided in contact with an upper part of the chalcogenide material layer and containing at least one element selected from a group comprising oxygen, nitrogen, carbon, and silicon; and

a plug electrode provided in contact with an upper part of the interface layer.

2 . The semiconductor device according to claim 1 , wherein the interface layer is in contact with the interlayer insulating film and the plug to be formed as a continuous film.

3 . The semiconductor device according to claim 1 , wherein the interface layer is in contact with the plug to be formed as a continuous film, and also is formed so as to let the interlayer insulating film be in contact with part of the chalcogenide material layer.

4 . The semiconductor device according to claim 1 , wherein the interface layer is in contact with the interlayer insulating film to be formed as a continuous film, and is also formed so as to let the plug be in contact with part of the chalcogenide material layer.

5 . The semiconductor device according to claim 1 , wherein an average film thickness of the interface layer is 0.1 nm or more and 5 nm or less.

6 . A semiconductor device comprising:

a semiconductor substrate;

a select transistor formed on a main surface of the semiconductor substrate;

an interlayer insulating film provided above the select transistor;

an interface layer formed on the interlayer insulating film;

a chalcogenide material layer formed on the interface layer; and

a plug formed between the interface layer and the select transistor in the interlayer insulating film so as to be in contact with the interface layer, wherein

the interface layer is formed so as to let part of the chalcogenide material layer be in contact with the plug, and

the interface layer is in contact with the interlayer insulating film to be formed as a continuous film.

7 - 8 . (canceled)

9 . A semiconductor device comprising:

a semiconductor substrate;

a select transistor formed on a main surface of the semiconductor substrate;

an interlayer insulating film provided above the select transistor;

an interface layer formed on the interlayer insulating film;

a chalcogenide material layer formed on the interface layer; and

a plug formed between the interface layer and the select transistor in the interlayer insulating film so as to be in contact with the interface layer, wherein

the interface layer is formed so as to let part of the chalcogenide material layer be in contact with the interlayer insulating film, and

the interface layer is in contact with the plug to be formed as a continuous film.

10 - 11 . (canceled)

12 . The semiconductor device according to claim 1 , wherein the interface layer contains Ta 2 O 5 or Cr 2 O 3 .

13 . The semiconductor device according to claim 6 , wherein the interface layer contains Ta 2 O 5 or Cr 2 O 3 .

14 . The semiconductor device according to claim 9 , wherein the interface layer contains Ta 2 O 5 or Cr 2 O 3 .

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 6, 2010
From: TERAO, MOTOYASU; MATSUI, YUICHI; KOGA, TSUYOSHI; MATSUZAKI, NOZOMU; TAKAURA, NORIKATSU; FUJISAKI, YOSHIHISA; KUROTSUCHI, KENZO; MORIKAWA, TAKAHIRO; SASAGO, YOSHITAKA; USHIYAMA, JUNKO; HIROTSUNE, AKEMI
To: RENESAS TECHNOLOGY CORP.
Reel/Frame 025452/0147 →
MERGER AND CHANGE OF NAME Recorded Sep 9, 2010
From: RENESAS TECHNOLOGY CORP.
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 024953/0672 →