IP Library Granted Patent US 8,274,454
Granted Patent B2
US 8,274,454 · App. 12/320,967 · Granted Sep 25, 2012

EL display panel, electronic apparatus and a method of driving EL display panel

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Quick Facts
Patent No.
US 8,274,454
App. No.
12/320,967
Granted
Sep 25, 2012
Kind
B2
Abstract

Disclosed herein is an electro luminescence display panel having a pixel structure corresponding to an active matrix drive system, including: a reverse bias potential generating portion configured to generate a reverse bias potential in which corresponding one of gradation values of pixels is reflected; and a voltage applying portion configured to apply the reverse bias potential to a gate electrode of a drive transistor composing a pixel circuit adapted to operate for a non-emission time period.

Claims (28)

1. An Electro Luminescence (EL) display panel having a pixel structure corresponding to an active matrix drive system, comprising:

a reverse bias potential generating portion configured to generate a reverse bias potential in which a corresponding one of gradation values of pixels is reflected; and

a voltage applying portion configured to apply the reverse bias potential to a gate electrode of a drive transistor composing a pixel circuit adapted to operate for a non-emission time period,

wherein the reverse bias potential is given by:

Vini=Vthel+Vcat −(α Vsig +β)(α>0 and β≧0)

where Vini is the reverse bias potential, Vthel is a threshold potential of an EL light emitting element, Vcat is a cathode potential of said EL light emitting element, α and β are coefficients, and Vsig is a signal potential.

2. The EL display panel according to claim 1 , wherein said reverse bias potential generating portion generates the reverse bias potential so that a reverse bias voltage corresponding to a high luminance is larger than that corresponding to a low luminance.

3. The EL display panel according to claim 1 , wherein said voltage applying portion applies either the reverse bias potential or a signal potential to signal lines in a time division manner.

4. The EL display panel according to claim 1 , wherein when a duty of a length of an emission time period occupied in one frame time period is switchable, said reverse bias potential generating portion sets a width of a change in reverse bias potential so that the width of the change in reverse bias potential is proportional to the duty of the emission time period.

5. An electronic apparatus comprising the EL display panel of claim 1 .

6. A method of driving an Electro Luminescence (EL) display panel having a pixel structure corresponding to an active matrix drive system, said method comprising the steps of:

generating a reverse bias potential in which a corresponding one of gradation values of pixels is reflected; and

applying the reverse bias potential to a gate electrode of a drive transistor composing a pixel circuit adapted to operate for a non-emission time period,

wherein the reverse bias potential is given by:

Vini=Vthel+Vcat −(α Vsig +β)(α>0 and β≧0)

where Vini is the reverse bias potential, Vthel is a threshold potential of an EL light emitting element, Vcat is a cathode potential of said EL light emitting element, α and β are coefficients, and Vsig is a signal potential.

7. The method according to claim 6 , wherein generating said reverse bias potential generates the reverse bias potential so that a reverse bias voltage corresponding to a high luminance is larger than that corresponding to a low luminance.

8. The method according to claim 6 , wherein applying said reverse bias potential applies either the reverse bias potential or a signal potential to signal lines in a time division manner.

9. The method according to claim 6 , wherein when a duty of a length of an emission time period occupied in one frame time period is switchable, generating said reverse bias potential sets a width of a change in reverse bias potential so that the width of the change in reverse bias potential is proportional to the duty of the emission time period.

10. An Electro Luminescence (EL) display panel having a pixel structure corresponding to an active matrix drive system, comprising:

reverse bias potential generating means for generating a reverse bias potential in which a corresponding one of gradation values of pixels is reflected; and

voltage applying means for applying the reverse bias potential to a gate electrode of a drive transistor composing a pixel circuit adapted to operate for a non-emission time period,

wherein the reverse bias potential is given by:

Vini=Vthel+Vcat −(α Vsig +β)(α>0 and β≧0)

where Vini is the reverse bias potential, Vthel is a threshold potential of an EL light emitting element, Vcat is a cathode potential of said EL light emitting element, α and β are coefficients, and Vsig is a signal potential.

11. The EL display panel according to claim 10 , wherein said reverse bias potential generating means generates the reverse bias potential so that a reverse bias voltage corresponding to a high luminance is larger than that corresponding to a low luminance.

12. The EL display panel according to claim 10 , wherein said voltage applying means applies either the reverse bias potential or a signal potential to signal lines in a time division manner.

13. The EL display panel according to claim 10 , wherein when a duty of a length of an emission time period occupied in one frame time period is switchable, said reverse bias potential generating means sets a width of a change in reverse bias potential so that the width of the change in reverse bias potential is proportional to the duty of the emission time period.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 18, 2025
From: JDI DESIGN AND DEVELOPMENT G.K.
To: MAGNOLIA BLUE CORPORATION
Reel/Frame 072039/0656 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 31, 2024
From: JOLED, INC.
To: JDI DESIGN AND DEVELOPMENT G.K.
Reel/Frame 066382/0619 →
CORRECTION BY AFFIDAVIT FILED AGAINST REEL/FRAME 063396/0671 Recorded Jun 12, 2023
From: JOLED, INC.
To: JOLED, INC.
Reel/Frame 064067/0723 →
SECURITY INTEREST Recorded Apr 20, 2023
From: JOLED, INC.
To: INCJ, LTD.
Reel/Frame 063396/0671 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 15, 2015
From: SONY CORPORATION
To: JOLED INC.
Reel/Frame 036106/0355 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 10, 2009
From: YAMAMOTO, TETSURO; UCHINO, KATSUHIDE
To: SONY CORPORATION
Reel/Frame 022286/0856 →