IP Library Granted Patent US 7,839,315
Granted Patent B2
US 7,839,315 · App. 12/323,496 · Granted Nov 23, 2010

Converter and method for converting an analog signal and comparator for use in such conversion

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,839,315
App. No.
12/323,496
Granted
Nov 23, 2010
Kind
B2
Abstract

A converter may include an input terminal to receive a first analog signal, a digital-to-analog converter to provide second analog signals related to digital values applied to the digital-to-analog converter, a comparator to receive the first and second analog signals, the comparator comprising a variable gain amplifier to provide an output signal based on a difference between the first and second analog signals, a state machine to receive the output signal of the comparator and generating the digital values applied to the digital-to-analog converter based on the output signal of the comparator, and a controller to selectively set the gain of the variable gain amplifier.

Claims (25)

1. A converter comprising:

an input terminal to receive a first analog signal;

a digital-to-analog converter to provide second analog signals related to digital values applied to the digital-to-analog converter;

a comparator to receive the first and second analog signals, the comparator comprising a variable gain amplifier to provide an output signal based on a difference between the first and second analog signals, the variable gain amplifier including a switch connected between a first and second output of the variable gain amplifier; and

a controller to selectively set the gain of the variable gain amplifier.

2. The converter according to claim 1 , wherein the converter is a successive approximation analog-to-digital converter.

3. The converter according to claim 1 , wherein the switch comprises a transistor.

4. The converter according to claim 3 , wherein the transistor comprises a first and second terminal, and at least one of the first and second terminals of the first transistor is connected via a first resistor to at least one of the first and second output of the variable gain amplifier.

5. The converter according to claim 4 , wherein the first terminal receives the first output via the first resistor and the second terminal receives the second output via a second resistor.

6. The converter according to claim 5 , wherein the variable gain amplifier further comprises a third and fourth resistor, wherein the third resistor is connected between a first node and a power supply rail, and the fourth resistor is connected between a second node and the power supply rail, wherein the first terminal of the transistor is connected via the first resistor to the first node and wherein the second terminal of the transistor is connected via the second resistor to the second node.

7. The converter according to claim 6 , wherein the amplifier further comprises a second transistor connected between the first node and a terminal of a current source and a third transistor connected between the second node and a terminal of the current source.

8. The converter according to claim 1 , wherein the variable gain amplifier is a differential amplifier.

9. A method for converting an analog input signal into a digital signal by successive approximation conversion comprising:

for each cycle of successive approximation:

selecting an adjustable gain based on a cycle of the successive approximation or a bit determined in a cycle of the successive approximation;

amplifying, with the adjustable gain, a signal related to a difference between a first analog signal related to the analog input signal and a second analog signal related to a predetermined digital value to provide an amplified difference signal;

generating another predetermined digital value based on the amplified difference signal; and

controlling the adjustable gain, such that the adjustable gain is different for at least two successive cycles.

10. The method according to claim 9 , wherein the adjustable gain is stepwise increased from a first gain to a second gain.

11. The method according to claim 10 , wherein the stepwise increase of the gain from the first gain to the second gain is repeated when the last cycle of the successive approximation is completed.

12. The method according to claim 11 , wherein the second gain is higher than the first gain and wherein the amplifying bandwidth of the second gain is lower than the amplifying bandwidth of the first gain.

13. The method according to claim 10 , wherein the gain is selectively adjusted by switching a gain of at least one of a plurality of amplifying stages.

14. The method according to claim 13 , wherein the gain of the at least one amplifying stage is switched such that each gain is within a range between 1.5 and 4.

15. The method according to claim 13 , wherein the gain is selectively adjusted by switching a transistor connected between a first and second output of the at least one amplifying stage.

16. The method according to claim 15 , wherein the transistor comprises a first and second terminal and at least one of the first and second terminal of the first transistor is connected via a first resistor to at least one of the first and second output of the at least one amplifying stage.

Assignments (8)
SECURITY AGREEMENT Recorded Jul 9, 2021
From: MAXLINEAR, INC.; MAXLINEAR COMMUNICATIONS, LLC; EXAR CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 056816/0089 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 27, 2020
From: INTEL CORPORATION
To: MAXLINEAR, INC.
Reel/Frame 053626/0636 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 20, 2020
From: LANTIQ BETEILIGUNGS-GMBH & CO. KG
To: INTEL CORPORATION
Reel/Frame 053259/0678 →
MERGER AND CHANGE OF NAME Recorded Jan 17, 2018
From: LANTIQ DEUTSCHLAND GMBH; LANTIQ BETEILIGUNGS-GMBH & CO. KG
To: LANTIQ BETEILIGUNGS-GMBH & CO. KG
Reel/Frame 045085/0940 →
RELEASE OF SECURITY INTEREST RECORDED AT REEL/FRAME 025413/0340 AND 025406/0677 Recorded Apr 17, 2015
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LANTIQ BETEILIGUNGS-GMBH & CO. KG
Reel/Frame 035453/0712 →
GRANT OF SECURITY INTEREST IN U.S. PATENTS Recorded Nov 29, 2010
From: LANTIQ DEUTSCHLAND GMBH
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 025406/0677 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 15, 2010
From: INFINEON TECHNOLOGIES WIRELESS SOLUTIONS GMBH
To: LANTIQ DEUTSCHLAND GMBH
Reel/Frame 024529/0656 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 3, 2010
From: INFINEON TECHNOLOGIES AG
To: INFINEON TECHNOLOGIES WIRELESS SOLUTIONS GMBH
Reel/Frame 024474/0937 →