IP Library Granted Patent US 8,407,401
Granted Patent B2
US 8,407,401 · App. 12/324,099 · Granted Mar 26, 2013

Methods, apparatuses, and computer program products for enhancing memory erase functionality

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Quick Facts
Patent No.
US 8,407,401
App. No.
12/324,099
Granted
Mar 26, 2013
Kind
B2
Abstract

A method, apparatus, and computer program product are provided for enhancing memory erase functionality. An apparatus may include a block-based mass memory and a controller configured to receive an erase command from a host device comprising an indication of a location of a block in the mass memory storing memory allocation data. The controller may be further configured to access the memory allocation data based at least in part upon the indicated location. The controller may additionally be configured to determine, based at least in part upon the memory allocation data, blocks within the mass memory that have been freed by the host device. The controller may also be configured to erase the freed blocks. Corresponding methods and computer program products are also provided.

Claims (47)

1. A method comprising:

receiving, at a controller embodied on a block-based mass memory, an erase command from a host device in communication with the mass memory such that the host device has ability to read from and write to the mass memory and is configured to free one or more blocks of the mass memory by writing to memory allocation data stored in the mass memory prior to sending the erase command to the controller, wherein the erase command comprises a location of a block storing memory allocation data for one or more blocks of the mass memory, an indication of a size of an entry in the memory allocation data, an indication of a value of an entry denoting that a corresponding block is free, an indication of a number of entries in the memory allocation data, an indication of a location of a block in the mass memory corresponding to the first entry in the memory allocation data, and an indication of a size of a block in the mass memory;

accessing the block storing memory allocation data based at least in part upon the location included in the erase command;

determining, based at least in part upon the memory allocation data, at least one block within the mass memory that has been freed by the host device; and

erasing the at least one freed block in response to the erase command.

2. A method according to claim 1 , wherein the host device has direct read and write access to the mass memory.

3. A method according to claim 1 , wherein erasing the freed blocks comprises securely erasing the freed blocks so that data erased from the freed blocks cannot be restored.

4. A method according to claim 1 , wherein:

receiving an erase command comprises receiving an erase command for each file system partition on the mass memory;

accessing the block storing memory allocation data comprises accessing the memory allocation data for each file system partition;

determining blocks within the mass memory that have been freed by the host device comprises determining blocks within each file system partition on the mass memory that have been freed by the host device; and

erasing the freed blocks comprises erasing the freed blocks in each file system partition.

5. A method according to claim 1 , wherein the location of the block storing memory allocation data for one or more blocks of the mass memory further comprises a location of a block storing data comprising a free/allocated status of one or more blocks of the mass memory.

6. A method according to claim 1 , wherein the mass memory comprises a flash memory.

7. A computer program product comprising at least one non-transitory computer-readable storage medium having computer-readable program instructions stored therein, the computer-readable program instructions comprising:

a program instruction for receiving, at a controller embodied on a block-based mass memory, an erase command from a host device in communication with the mass memory such that the host device has ability to read from and write to the mass memory and is configured to free one or more blocks of the mass memory by writing to memory allocation data stored in the mass memory prior to sending the erase command to the controller, wherein the erase command comprises a location of a block storing memory allocation data for one or more blocks of the mass memory, an indication of a size of an entry in the memory allocation data, an indication of a value of an entry denoting that a corresponding block is free, an indication of a number of entries in the memory allocation data, an indication of a location of a block in the mass memory corresponding to the first entry in the memory allocation data, and an indication of a size of a block in the mass memory;

a program instruction for accessing the block storing memory allocation data based at least in part upon the location included in the erase command;

a program instruction for determining, based at least in part upon the memory allocation data, at least one block within the mass memory that has been freed by the host device; and

a program instruction for erasing the at least one freed block in response to the erase command.

8. A computer program product according to claim 7 , wherein the host device has direct read and write access to the mass memory.

9. A computer program product according to claim 7 , wherein the program instruction for erasing the freed blocks comprises instructions for securely erasing the freed blocks so that data erased from the freed blocks cannot be restored.

10. A computer program product according to claim 7 , wherein:

the program instruction for receiving an erase command comprises instructions for receiving an erase command for each file system partition on the mass memory;

the program instruction for accessing the block storing memory allocation data comprises instructions for accessing the memory allocation data for each file system partition;

the program instruction for determining blocks within the mass memory that have been freed by the host device comprises instructions for determining blocks within each file system partition on the mass memory that have been freed by the host device; and

the program instruction for erasing the freed blocks comprises instructions for erasing the freed blocks in each file system partition.

11. A computer program product according to claim 7 , wherein the location of the block storing memory allocation data for one or more blocks of the mass memory further comprises a location of a block storing data comprising a free/allocated status of one or more blocks of the mass memory.

12. A computer program product according to claim 7 , wherein the mass memory comprises a flash memory.

13. An apparatus comprising a block-based mass memory and a controller, wherein the controller is configured to:

receive an erase command from a host device in communication with the mass memory such that the host device has ability to read from and write to the mass memory and is configured to free one or more blocks of the mass memory by writing to memory allocation data stored in the mass memory prior to sending the erase command to the controller, wherein the erase command comprises a location of a block storing memory allocation data for one or more blocks of the mass memory, an indication of a size of an entry in the memory allocation data, an indication of a value of an entry denoting that a corresponding block is free, an indication of a number of entries in the memory allocation data, an indication of a location of a block in the mass memory corresponding to the first entry in the memory allocation data, and an indication of a size of a block in the mass memory;

access the block storing memory allocation data based at least in part upon the location included in the erase command;

determine, based at least in part upon the memory allocation data, at least one block within the mass memory that has been freed by the host device; and

erase the at least one freed block in response to the erase command.

14. The apparatus of claim 13 , wherein the host device has direct read and write access to the mass memory.

15. The apparatus of claim 13 , wherein the controller is configured to erase the freed blocks by securely erasing the freed blocks so that data erased from the freed blocks cannot be restored.

16. The apparatus of claim 13 , wherein the controller is configured to:

receive an erase command by receiving an erase command for each file system partition on the mass memory;

access the block storing memory allocation data by accessing the memory allocation data for each file system partition;

determine blocks within the mass memory that have been freed by the host device by determining blocks within each file system partition on the mass memory that have been freed by the host device; and

erase the freed blocks by erasing the freed blocks in each file system partition.

17. The apparatus of claim 13 , wherein the location of the block storing memory allocation data for one or more blocks of the mass memory further comprises a location of a block storing data comprising a free/allocated status of one or more blocks of the mass memory.

18. The apparatus of claim 13 , wherein the mass memory comprises a flash memory.

19. An apparatus comprising:

means for receiving, at a controller embodied on a block-based mass memory, an erase command from a host device in communication with the memory such that the host device has ability to read from and write to the memory and is configured to free one or more blocks of the mass memory by writing to memory allocation data stored in the mass memory prior to sending the erase command to the controller, wherein the erase command comprises a location of a block storing memory allocation data for one or more blocks of the mass memory, an indication of a size of an entry in the memory allocation data, an indication of a value of an entry denoting that a corresponding block is free, an indication of a number of entries in the memory allocation data, an indication of a location of a block in the mass memory corresponding to the first entry in the memory allocation data, and an indication of a size of a block in the mass memory;

means for accessing the block storing memory allocation data based at least in part upon the location included in the erase command;

means for determining, based at least in part upon the memory allocation data, at least one block within the mass memory that has been freed by the host device; and

means for erasing the at least one freed block in response to the erase command.

Assignments (10)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 2, 2023
From: CONVERSANT WIRELESS LICENSING S.A R.L.
To: CONVERSANT WIRELESS LICENSING LTD.
Reel/Frame 063508/0112 →
RELEASE OF SECURITY INTEREST Recorded Apr 13, 2021
From: CPPIB CREDIT INVESTMENTS INC.
To: CONVERSANT WIRELESS LICENSING S.A R.L.
Reel/Frame 055910/0832 →
AMENDED AND RESTATED U.S. PATENT SECURITY AGREEMENT (FOR NON-U.S. GRANTORS) Recorded Aug 22, 2018
From: CONVERSANT WIRELESS LICENSING S.A R.L.
To: CPPIB CREDIT INVESTMENTS, INC.
Reel/Frame 046897/0001 →
CHANGE OF NAME Recorded Oct 20, 2017
From: CORE WIRELESS LICENSING S.A.R.L.
To: CONVERSANT WIRELESS LICENSING S.A R.L.
Reel/Frame 044250/0398 →
UCC FINANCING STATEMENT AMENDMENT - DELETION OF SECURED PARTY Recorded Aug 30, 2016
From: NOKIA CORPORATION
To: MICROSOFT CORPORATION
Reel/Frame 039872/0112 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 4, 2012
From: 2011 INTELLECTUAL PROPERTY ASSET TRUST
To: CORE WIRELESS LICENSING S.A.R.L
Reel/Frame 027485/0472 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 26, 2011
From: NOKIA CORPORATION
To: NOKIA 2011 PATENT TRUST
Reel/Frame 027120/0608 →
CHANGE OF NAME Recorded Oct 26, 2011
From: NOKIA 2011 PATENT TRUST
To: 2011 INTELLECTUAL PROPERTY ASSET TRUST
Reel/Frame 027121/0353 →
SHORT FORM PATENT SECURITY AGREEMENT Recorded Sep 13, 2011
From: CORE WIRELESS LICENSING S.A.R.L.
To: NOKIA CORPORATION; MICROSOFT CORPORATION
Reel/Frame 026894/0665 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 12, 2009
From: LUUKKAINEN, OLLI OLAVI
To: NOKIA CORPORATION
Reel/Frame 022088/0397 →