IP Library Granted Patent US 7,705,629
Granted Patent B1
US 7,705,629 · App. 12/327,702 · Granted Apr 27, 2010

Permutable switching network with enhanced interconnectivity for multicasting signals

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Quick Facts
Patent No.
US 7,705,629
App. No.
12/327,702
Granted
Apr 27, 2010
Kind
B1
Abstract

In one embodiment, the integrated circuit has a L-level permutable switching network (L-PSN) comprising L levels of intermediate conductors. The integrated circuit can be used in electronic devices, such as switching networks, routers, and programmable logic circuits, etc.

Claims (116)

1. An integrated circuit, comprising: a L-level permutable switching network (L-PSN);

wherein the L-PSN comprises:

for L≧1, L levels of conductors comprising:

an i-th level of conductors of I[i] number of conductors comprising D[i] sets of conductors,

wherein (I[i]/D[i])>1 and D[i]>1 for i=[1:L],

wherein at least one j where D[j]>2 for j selected from j=[1:L];

an 0-th level of conductors of I[0] number of conductors,

wherein (I[0]/Π i=[1:L] D[i])>1;

an (L+1)-th level of conductors of I[L+1] number of conductors comprising D[L+1] sets of conductors,

wherein D[L+1]>2,

wherein (I[L+1]/D[L+1])=Π i=[1:L] D[i]; and

Σ i=[1:L+1] (I[i−1]×D[i]) number of switches;

wherein the I[i−1] number of conductors of the (i−1)-th level of conductors selectively couple to (I[i]/D[i]) number of conductors of each of the D[i] sets of conductors of the i-th level of conductors of I[i] number of conductors through I[i−1] number of switches of a respective (I[i−1]×D[i]) number of switches of the Σ i=[1:L+1] (I[i−1]×D[i]) number of switches for i=[1:L+1];

wherein each conductor of the I[i−1] number of conductors of the (i−1)-th level of conductors selectively couples to one conductor in each of the D[i] sets of conductors of the i-th level of conductors of I[i] number of conductors through a respective switch of the respective I[i−1] number of switches for i=[1:L+1]; and

for a j selected from j=[1:L+1], T>1 and D S [j]=D[j]×(I[j−1]/I[j]), at least (T×D S [j]) number of conductors of an (j−1)-th level of conductors of I[j−1] number of conductors selectively couple to T number of conductors in each of the D[j] sets of conductors of the j-th level of conductors of I[j] number of conductors through (T×D S [j]×D[j]) number of switches of the (I[j−1]×D[j]) number of switches,

wherein any D S [j] number of conductors selected from the (T×D S [j]) number of conductors of the (j−1)-th level of conductors selectively couple to at least two conductors of at least one of the D[j] sets of conductors respectively having T number of conductors in each of the D[j] sets of the j-th level of conductors through a respective D S [j] number of switches of the (T×D S [j]×D[j]) number of switches.

2. The integrated circuit of claim 1 , wherein any D S [j] number of conductors of the (T×D S [j]) number of conductors selectively couple to at least (D[j]+1) number of conductors of the T number of conductors of the D[j] sets of conductors through (D S [j]×D[j]) number of switches of the (T×D S [j]×D[j]) number of switches,

wherein the (D[j]+1) number of conductors comprises at least one conductor from each of the D[j] sets of conductors of T number of conductors of the I[j] number of conductors.

3. The integrated circuit of claim 2 , wherein T=(I[j−1]/D S [j]).

4. The integrated circuit of claim 2 , wherein each conductor in each of the D[j] sets of conductors selectively couples to D S [j] number of conductors of the (j−1)-th level of conductors through D S [j] number of switches of the respective I[j−1] number of switches.

5. The integrated circuit of claim 1 , wherein any SC>0 number of the (T×D S [j]) number of conductors selectively couple to CC number of conductors of the T number of conductors of the D[j] sets of conductors through (SC×D[j]) number of switches of the (T×D S [j]×D[j]) number of switches,

wherein the SC number of conductors selectively couple, through SC number of switches of the (SC×D[j]) number of switches, to each of the D[j] sets of conductors of T number of conductors;

wherein the CC number of conductors comprises at least one conductor from each of the D[j] sets of T number of conductors of the I[j] number of conductors; and

wherein CC is at least (SC+D[j]−1) and is at most (T×D[j]).

6. The integrated circuit of claim 5 , wherein T=(I[j−1]/D S [j]).

7. The integrated circuit of claim 5 , wherein each conductor in each of the D[j] sets of conductors selectively couples to D S [j] number of conductors of the (j−1)-th level of conductors through D S [j] number of switches of the respective I[j−1] number of switches.

8. The integrated circuit of claim 1 , wherein for T≧D[j]≧3, any SC=2 number of conductors of the (T×D S [j]) number of conductors selectively couple to CC number of conductors of the T number of conductors of the D[j] sets of conductors through (SC×D[j]) number of switches of the (T×D S [j]×D[j]) number of switches; and

wherein the CC number of conductors has at least four conductors selected from any three sets of the D[j] sets of conductors of T number of conductors.

9. The integrated circuit of claim 8 , wherein T=(I[j−1]/D S [j]).

10. The integrated circuit of claim 8 , wherein each conductor in each of the D[j] sets of conductors selectively couples to D S [j] number of conductors of the (j−1)-th level of conductors through D S [j] number of switches of the respective I[j−1] number of switches.

11. The integrated circuit of claim 1 , wherein for T≧2D[j], any SC=2 number of conductors of the (T×D S [j]) number of conductors selectively couple to CC number of conductors of the T number of conductors of the D[j] sets of conductors through (SC×D[j]) number of switches of the (T×D S [j]×D[j]) number of switches; and

wherein the CC number of conductors has at least three conductors selected from any two sets of the D[j] sets of conductors of T number of conductors.

12. The integrated circuit of claim 11 , wherein T=(I[j−1]/D S [j]).

13. The integrated circuit of claim 11 , wherein each conductor in each of the D[j] sets of conductors selectively couples to D S [j] number of conductors of the (j−1)-th level of conductors through DAB number of switches of the respective I[j−1] number of switches.

14. The integrated circuit of claim 1 , wherein for T≧(D S [j]×D[j]), any SC=D S [j] number of conductors of the (T×D S [j] number of conductors selectively couple to CC number of conductors of the T number of conductors of the D[j] sets of conductors through (SC×D[j]) number of switches of the (T×D S [j]×D[j]) number of switches; and

wherein CC is at least D S [j]×(D[j]−1)+1.

15. The integrated circuit of claim 14 , wherein T=(I[j−1]/D S [j]).

16. The integrated circuit of claim 14 , wherein each conductor in each of the D[j] sets of conductors selectively couples to D S [j] number of conductors of the (j−1)-th level of conductors through D S [j] number of switches of the respective I[j−1] number of switches.

17. A method of manufacture an integrated circuit, comprising:

fabricating a L-level permutable switching network (L-PSN),

wherein the L-PSN comprises:

for L≧1, L levels of conductors comprises:

an i-th level of conductors of I[i] number of conductors comprising D[i] sets of conductors,

wherein (I[i]/D[i])>1 and D[i]>1 for i=[1:L],

wherein at least one j where D[j]>2 for j selected from j=[1:L];

an 0-th level of conductors of I[0] number of conductors,

wherein (I[0]/Π i=[1:L] D[i])>1;

an (L+1)-th level of conductors of I[L+1] number of conductors comprising D[L+1] sets of conductors,

wherein D[L+1]>2,

wherein (I[L+1]/D[L+1])=Π i=[1:L] D[i]; and

Σ i=[1:L+1] (I[i−1]×D[i]) number of switches;

selectively coupling the I[i−1] number of conductors of the (i−1)-th level of conductors to (I[i]/D[i]) number of conductors of each of the D[i] sets of conductors of the i-th level of conductors of I[i] number of conductors through I[i−1] number of switches of a respective (I[i−1]×D[i]) number of switches of the Σ i=[1:L] (I[i−1]×D[i]) number of switches for i=[1:L+1];

selectively coupling each conductor of the I[i−1] number of conductors of the (i−1)-th level of conductors to one conductor in each of the D[i] sets of conductors of the i-th level of conductors of I[i] number of conductors through a respective switch of the respective I[i−1] number of switches for i=[1:L+1];

for a j selected from j=[1:L+1], T>1 and D S [j]=D[j]×(I[j−1]/I[j]), selectively coupling at least (T×D S [j]) number of conductors of an (j−1)-th level of conductors of I[j−1] number of conductors to T number of conductors in each of the D[j] sets of conductors of the j-th level of conductors of I[j] number of conductors through (T×D S [j]×D[j]) number of switches of the (I[j−1]×D[j]) number of switches; and

selectively coupling any D S [j] number of conductors selected from the (T×D S [j]) number of conductors of the (j−1)-th level of conductors to at least two conductors of at least one of the D[j] sets of conductors respectively having T number of conductors in each of the D[j] sets of the j-th level of conductors through a respective D S [j] number of switches of the (T×D S [j]×D[j]) number of switches.

18. The method of claim 17 , further comprising selectively coupling any D S [j] number of conductors of the (T×D S [j]) number of conductors to at least (D[j]+1) number of conductors of the T number of conductors of the D[j] sets of conductors through (D S [j]×D[j]) number of switches of the (T×D S [j]×D[j]) number of switches,

wherein the (D[j]+1) number of conductors comprises at least one conductor from each of the D[j] sets of conductors of T number of conductors of the I[j] number of conductors.

19. The method of claim 18 , wherein T=(I[j−1]/D S [j]).

20. The method of claim 18 , further comprising selectively coupling each conductor in each of the D[j] sets of conductors to D S [j] number of conductors of the (j−1)-th level of conductors through D S [j] number of switches of the respective I[j−1] number of switches.

21. The method of claim 17 , further comprising

selectively coupling any SC>0 number of the (T×D S [j]) number of conductors to CC number of conductors of the T number of conductors of the D[j] sets of conductors through (SC×D[j]) number of switches of the (T×D S [j]×D[j]) number of switches; and

selectively coupling the SC number of conductors, through SC number of switches of the (SC×D[j]) number of switches, to each of the D[j] sets of conductors of T number of conductors,

wherein the CC number of conductors comprises at least one conductor from each of the D[j] sets of T number of conductors of the I[j] number of conductors, and

wherein CC is at least (SC+D[j]−1) and is at most (T×D[j]).

22. The method of claim 21 , wherein T=(I[j−1]/D S [j]).

23. The method of claim 21 , further comprising selectively coupling each conductor in each of the D[j] sets of conductors to D S [j] number of conductors of the (j−1)-th level of conductors through D S [j] number of switches of the respective I[j−1] number of switches.

24. The method of claim 17 , further comprising selectively coupling, for T≧D[j]≧3, any SC=2 number of conductors of the (T×D S [j]) number of conductors to CC number of conductors of the T number of conductors of the D[j] sets of conductors through (SC×D[j]) number of switches of the (T×D S [j]×D[j]) number of switches,

wherein the CC number of conductors has at least four conductors selected from any three sets of the D[j] sets of conductors of T number of conductors.

25. The method of claim 24 , wherein T=(I[j−1]/D S [j]).

26. The method of claim 24 , further comprising selectively coupling each conductor in each of the D[j] sets of conductors to D S [j] number of conductors of the (j−1)-th level of conductors through D S [j] number of switches of the respective I[j−1] number of switches.

27. The method of claim 17 , further comprising selectively coupling, for T≧2D[j], any SC=2 number of conductors of the (T×D S [j]) number of conductors to CC number of conductors of the T number of conductors of the D[j] sets of conductors through (SC×D[j]) number of switches of the (T×D S [j]×D[j]) number of switches,

wherein the CC number of conductors has at least three conductors selected from any two sets of the D[j] sets of conductors of T number of conductors.

28. The method of claim 27 , wherein T=(I[j−1]/D S [j]).

29. The method of claim 27 , further comprising selectively coupling each conductor in each of the D[j] sets of conductors to D S [j] number of conductors of the (j−1)-th level of conductors through D S [j] number of switches of the respective I[j−1] number of switches.

30. The method of claim 17 , further comprising selectively coupling, for T≧(D S [j]×D[j]), any SC=D S [j] number of conductors of the (T×D S [j]) number of conductors to CC number of conductors of the T number of conductors of the D[j] sets of conductors through (SC×D[j]) number of switches of the (T×D S [j]×D[j]) number of switches,

wherein CC is at least D S [j]×(D[j]−1)+1.

31. The method of claim 30 , wherein T=(I[j−1]/D S [j]).

32. The method of claim 30 , further comprising selectively coupling each conductor in each of the D[j] sets of conductors to D S [j] number of conductors of the (j−1)-th level of conductors through D S [j] number of switches of the respective I[j−1] number of switches.

33. An article of manufacture comprising a machine readable storage medium that stores data representing an integrated circuit layout, comprising: a L-level permutable switching network (L-PSN);

wherein the L-PSN comprises:

for L≧1, L levels of conductors comprises:

an i-th level of conductors of I[i] number of conductors comprising D[i] sets of conductors,

wherein (I[i]/D[i])>1 and D[i]>1 for i=[1:L],

wherein at least one j where D[j]>2 for j selected from j=[1:L];

an 0-th level of conductors of I[0] number of conductors,

wherein (I[0]/Π i=[1:L] D[i])>1;

an (L+1)-th level of conductors of I[L+1] number of conductors comprising D[L+1] sets of conductors,

wherein D[L+1]>2,

wherein (I[L+1]/D[L+1])=Π i=[1:L] D[i]; and

Σ i=[1:L] (I[i−1]×D[i]) number of switches;

wherein the I[i−1] number of conductors of the (i−1)-th level of conductors selectively couple to (I[i]/D[i]) number of conductors of each of the D[i] sets of conductors of the i-th level of conductors of I[i] number of conductors through I[i−1] number of switches of a respective (I[i−1]×D[i]) number of switches of the Σ i=[1:L] (I[i−1]×D[i]) number of switches for i=[1:L+1];

wherein each conductor of the I[i−1] number of conductors of the (i−1)-th level of conductors selectively couples to one conductor in each of the D[i] sets of conductors of the i-th level of conductors of I[i] number of conductors through a respective switch of the respective I[i−1] number of switches for i=[1:L+1]; and

for an j selected from j=[1:L+1], T>1 and D S [j]=D[j]×(I[j−1]/I[j]), at least (T×D S [j]) number of conductors of an (j−1)-th level of conductors of I[j−1] number of conductors selectively couple to T number of conductors in each of the D[j] sets of conductors of the j-th level of conductors of I[j] number of conductors through (T×D S [j]×D[j]) number of switches of the (I[j−1]×D[j]) number of switches,

wherein any D S [j] number of conductors selected from the (T×D S [j]) number of conductors of the (j−1)-th level of conductors selectively couple to at least two conductors of at least one of the D[j] sets of conductors respectively having T number of conductors in each of the D[j] sets of the j-th level of conductors through a respective D S [j] number of switches of the (T×D S [j]×D[j]) number of switches.

34. The article of manufacture of claim 33 , wherein any D S [j] number of conductors of the (T×D S [j]) number of conductors selectively couple to at least (D[j]+1) number of conductors of the T number of conductors of the D[j] sets of conductors through (D S [j]×D[j]) number of switches of the (T×D S [j]×D[j]) number of switches,

wherein the (D[j]+1) number of conductors comprises at least one conductor from each of the D[j] sets of conductors of T number of conductors of the I[j] number of conductors.

35. The article of manufacture of claim 34 , wherein T=(I[j−1]/D S [j]).

36. The article of manufacture of claim 34 , wherein each conductor in each of the D[j] sets of conductors selectively couples to D S [j] number of conductors of the (j−1)-th level of conductors through D S [j] number of switches of the respective I[j−1] number of switches.

37. The article of manufacture of claim 33 , wherein any SC>0 number of the (T×D S [j]) number of conductors selectively couple to CC number of conductors of the T number of conductors of the D[j] sets of conductors through (SC×D[j]) number of switches of the (T×D S [j]×D[j]) number of switches,

wherein the SC number of conductors selectively couple, through SC number of switches of the (SC×D[j]) number of switches, to each of the D[j] sets of conductors of T number of conductors;

wherein the CC number of conductors comprises at least one conductor from each of the D[j] sets of T number of conductors of the I[j] number of conductors; and

wherein CC is at least (SC+D[j]−1) and is at most (T×DUD.

38. The article of manufacture of claim 37 , wherein T=(I[j−1]/D S [j]).

39. The article of manufacture of claim 37 , wherein each conductor in each of the D[j] sets of conductors selectively couples to D S [j] number of conductors of the (j−1)-th level of conductors through D S [j] number of switches of the respective I[j−1] number of switches.

40. The article of manufacture of claim 33 , wherein for T≧D[j]≧3, any SC=2 number of conductors of the (T×D S [j]) number of conductors selectively couple to CC number of conductors of the T number of conductors of the D[j] sets of conductors through (SC×D[j]) number of switches of the (T×D S [j]×D[j]) number of switches; and

wherein the CC number of conductors has at least four conductors selected from any three sets of the D[j] sets of conductors of T number of conductors.

41. The article of manufacture of claim 40 , wherein T=(I[j−1]/D S [j]).

42. The article of manufacture of claim 40 , wherein each conductor in each of the D[j] sets of conductors selectively couples to D S [j] number of conductors of the (j−1)-th level of conductors through D S [j] number of switches of the respective I[j−1] number of switches.

43. The article of manufacture of claim 33 , wherein for T≧2D[j], any SC=2 number of conductors of the (T×D S [j]) number of conductors selectively couple to CC number of conductors of the T number of conductors of the D[j] sets of conductors through (SC×D[j]) number of switches of the (T×D S [j]×D[j]) number of switches; and

wherein the CC number of conductors has at least three conductors selected from any two sets of the D[j] sets of conductors of T number of conductors.

44. The article of manufacture of claim 43 , wherein T=(I[j−1]/D S [j]).

45. The article of manufacture of claim 43 , wherein each conductor in each of the D[j] sets of conductors selectively couples to D S [j] number of conductors of the (j−1)-th level of conductors through D S [j] number of switches of the respective I[j−1] number of switches.

46. The article of manufacture of claim 33 , wherein for T≧(D S [j]×DUD, any SC=D S [j] number of conductors of the (T×D S [j]) number of conductors selectively couple to CC number of conductors of the T number of conductors of the D[j] sets of conductors through (SC×D[j]) number of switches of the (T×D S [j]×DUD number of switches; and

wherein CC is at least D S [j]×(D[j]−1)+1.

47. The article of manufacture of claim 46 , wherein T=(I[j−1]/D S [j]).

48. The article of manufacture of claim 46 , wherein each conductor in each of the D[j] sets of conductors selectively couples to D S [j] number of conductors of the (j−1)-th level of conductors through D S [j] number of switches of the respective I[j−1] number of switches.

Assignments (6)
RELEASE OF SECURITY INTEREST Recorded Oct 26, 2020
From: JEFFERIES FINANCE LLC
To: RPX CORPORATION
Reel/Frame 054486/0422 →
PATENT SECURITY AGREEMENT Recorded Oct 23, 2020
From: RPX CLEARINGHOUSE LLC; RPX CORPORATION
To: BARINGS FINANCE LLC, AS COLLATERAL AGENT
Reel/Frame 054198/0029 →
PATENT SECURITY AGREEMENT Recorded Oct 23, 2020
From: RPX CLEARINGHOUSE LLC; RPX CORPORATION
To: BARINGS FINANCE LLC, AS COLLATERAL AGENT
Reel/Frame 054244/0566 →
SECURITY INTEREST Recorded Jun 29, 2018
From: RPX CORPORATION
To: JEFFERIES FINANCE LLC
Reel/Frame 046486/0433 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 17, 2016
From: ADVANTAGE LOGIC, INC.
To: RPX CORPORATION
Reel/Frame 038609/0807 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 4, 2009
From: PANI, PETER M.; TING, BENJAMIN S.
To: ADVANTAGE LOGIC, INC.
Reel/Frame 022210/0283 →