IP Library Patent Application 12331345
Patent Application
App. No. 12/331,345

Modified-SIMD Data Processing Architecture

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Quick Facts
Patent No.
US None
App. No.
12/331,345
Abstract

An apparatus and method for processing data includes an array of processing elements to simultaneously perform operations on multiple data elements using a single instruction. A grouping module assigns each processing element within the array to one of several groups. A modification module designates how each group of processing elements should handle the single instruction. This enables each group of processing elements to handle the single instruction differently. Each processing element is configured to handle the single instruction based on the group the processing element belongs to.

Claims (36)

1 . An apparatus for processing data, the apparatus comprising:

an array of processing elements to simultaneously perform operations on a plurality of data elements using a single instruction;

a grouping module to assign each processing element within the array to one of a plurality of groups;

a modification module to designate how each group of processing elements should handle the single instruction, thereby enabling each group of processing elements to handle the single instruction differently; and

each processing element further configured to handle the single instruction based on the group the processing element belongs to.

2 . The apparatus of claim 1 , wherein the grouping module uses a processing element map to designate which group each processing element belongs to.

3 . The apparatus of claim 1 , wherein the modification module uses an instruction modifier to designate how a group of processing elements should handle the single instruction.

4 . The apparatus of claim 3 , wherein the instruction modifier further designates how to modify at least one operand of the single instruction.

5 . The apparatus of claim 4 , wherein the at least one operand includes a source operand.

6 . The apparatus of claim 4 , wherein the at least one operand includes a destination operand.

7 . The apparatus of claim 4 , wherein the at least one operand includes a source operand and a destination operand.

8 . The apparatus of claim 1 , wherein the array of processing elements is an n×m array of processing elements.

9 . The apparatus of claim 1 , wherein the array of processing elements is an n×n array of processing elements.

10 . A method for processing data, the method comprising:

simultaneously performing, with an array of processing elements, operations on a plurality of data elements using a single instruction;

assigning each processing element within the array to one of a plurality of groups;

designating how each group of processing elements should handle the single instruction, thereby enabling each group to handle the single instruction differently; and

handling, with each processing element, the single instruction based on the group the processing element belongs to.

11 . The method of claim 10 , further comprising providing a processing element map to designate which group each processing element belongs to.

12 . The method of claim 10 , further comprising assigning an instruction modifier to each group, the instruction modifier designating how each group of processing elements should handle the single instruction.

13 . The method of claim 12 , wherein the instruction modifier further designates how to modify at least one operand of the single instruction.

14 . The method of claim 13 , wherein the at least one operand includes a source operand.

15 . The method of claim 13 , wherein the at least one operand includes a destination operand.

16 . The method of claim 13 , wherein the at least one operand includes a source operand and a destination operand.

17 . The method of claim 10 , wherein the array of processing elements is an n×m array of processing elements.

18 . The method of claim 10 , wherein the array of processing elements is an n×n array of processing elements.

19 . An apparatus for processing data, the apparatus comprising:

an array of processing elements to simultaneously perform operations on a plurality of data elements using a single instruction; and

a modification module to designate how each processing element should handle the single instruction, thereby enabling each processing element to handle the single instruction differently.

20 . The apparatus of claim 19 , wherein the modification module uses an instruction modifier to designate how each processing element should handle the single instruction.

21 . The apparatus of claim 20 , wherein the instruction modifier further designates how to modify at least one operand of the single instruction.

22 . A method for processing data, the method comprising:

simultaneously performing, with an array of processing elements, operations on a plurality of data elements using a single instruction; and

designating how each processing element should handle the single instruction, thereby enabling each processing element to handle the single instruction differently.

23 . The method of claim 22 , further comprising assigning an instruction modifier to each processing element, the instruction modifier designating how each processing element should handle the single instruction.

24 . The method of claim 23 , wherein the instruction modifier further designates how to modify at least one operand of the single instruction.

Assignments (2)
SECURITY AGREEMENT Recorded Jul 7, 2009
From: NOVAFORA, INC.
To: SILICON VALLEY BANK
Reel/Frame 022917/0465 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 10, 2008
From: RAKIB, SHLOMO SELIM; ZARAI, YORAM
To: NOVAFORA INC.
Reel/Frame 021955/0172 →