System and method for detection of non-deterministic memory access events
View Patent ↗A concurrent and asynchronous system may be managed by monitoring the performance of a plurality of operations that access a designated region of memory. In that region of memory, an occurrence of a potentially non-deterministic event can be detected when at least one of the operations is a write operation. The occurrence of the potentially non-deterministic event may then be recorded.
1. A computer-implemented method to manage a concurrent, asynchronous system, the method being implemented by one or more processors that are associated with a memory, wherein the method comprises:
monitoring performance of a plurality of concurrent and asynchronous operations that access one of a plurality of designated regions of the memory;
detecting an occurrence of a potentially non-deterministic event in an accessed region of memory that corresponds to occurrence of two or more concurrent and asynchronous operations, of which at least one is a write operation; and
recording the occurrence of the potentially non-deterministic event.
2. The method of claim 1 , wherein recording the occurrence of the potentially non-deterministic event includes generating an error notification.
3. The method of claim 1 , wherein monitoring performance of a plurality of concurrent and asynchronous operations includes monitoring one or more buffer constructs that represent the accessed region of memory; and
wherein the one or more processors are configured to detect an occurrence of a potentially non-deterministic event by comparing, during a merge operation that follows one or more prior clone operations, memory addresses accessed by each concurrent and asynchronous operation in the accessed region of memory in order to make a determination as to whether the memory addresses accessed by each concurrent and asynchronous operation overlap in the accessed region of memory; wherein each clone operation generates a clone of a corresponding buffer construct that represents the accessed region of memory, and each merge operation merges at least the clone and the corresponding buffer construct so that a merged buffer construct exists after the merge operation.
4. The method of claim 1 , wherein monitoring performance of a plurality of concurrent and asynchronous operations includes executing logic associated with one or more tasks that generate the plurality of concurrent and asynchronous operations.
5. The method of claim 1 , wherein detecting an occurrence of a potentially non-deterministic event includes executing logic associated with one or more buffer constructs to detect the occurrence.
6. The method of claim 1 , wherein detecting an occurrence of a potentially non-deterministic event includes detecting occurrence of two concurrent and asynchronous operations that include a write operation and a read operation.
7. The method of claim 1 , wherein detecting an occurrence of a potentially non-deterministic event includes detecting occurrence of two concurrent and asynchronous operations that include two or more write operations.
8. A computer system configured to detect potential non-deterministic memory accesses, the system comprising:
one or more processors configured to:
monitor performance of a plurality of concurrent and asynchronous operations that access a region of memory;
detect an occurrence of a potentially non-deterministic event in the region of memory that corresponds to occurrence of two or more concurrent and asynchronous operations, of which at least one is a write operation; and
record the occurrence of the potentially non-deterministic event.
9. The computer system of claim 8 , wherein the one or more processors are configured to record the occurrence of the potentially non-deterministic event by generating an error notification.
10. The computer system of claim 8 , wherein the one or more processors are configured to monitor performance of a plurality of concurrent and asynchronous operations by monitoring one or more buffer constructs that represent the region of memory; and
wherein the one or more processors are configured to detect an occurrence of a potentially non-deterministic event by comparing, during a merge operation that follows one or more prior clone operations, memory addresses accessed by each concurrent and asynchronous operation in the region of memory in order to make a determination as to whether the memory addresses accessed by each concurrent and asynchronous operation overlap in the region of memory; wherein each clone operation generates a clone of a corresponding buffer construct that represents the region of memory, and each merge operation merges at least the clone and the corresponding buffer construct so that a merged buffer construct exists after the merge operation.
11. The computer system of claim 8 , wherein the one or more processors are configured to monitor performance of a plurality of concurrent and asynchronous operations by executing logic associated with one or more tasks that generate the plurality of concurrent and asynchronous operations.
12. A computer system configured to detect potential non-deterministic memory accesses, the computer system comprising:
logic, implemented by one or more processors, the logic being associated with a region of memory and being configured to:
detect a potential non-deterministic event corresponding to at least two or more concurrent asynchronous operations performed on each of two or more buffer constructs that are associated with the region of memory by comparing, during a merge operation that follows one or more prior clone operations, memory addresses accessed by each concurrent and asynchronous operation in the region of memory in order to make a determination as to whether the memory addresses accessed by each concurrent and asynchronous operation overlap in the region of memory; and
record the occurrence of the potential non-deterministic event.
13. The computer system of claim 12 , wherein the logic is configured to detect the potential non-deterministic event by monitoring each of the two or more buffer constructs to determine whether corresponding tasks that use each of the two or more buffer constructs perform concurrent operations that collectively include at least one write operation.
14. The computer system of claim 12 , wherein the logic is configured to detect the potential non-deterministic event by monitoring each of two or more tasks that individually operate on corresponding buffer constructs to determine whether the tasks use the corresponding buffer constructs to perform concurrent operations that collectively include at least one write operation.
15. The computer system of claim 12 , wherein the logic is distributed to execute at least in part by individual buffer constructs.
16. The computer system of claim 12 , wherein the logic maintains a data structure that records instances of individual operations performed on the region of memory.
17. The computer system of claim 12 , wherein the logic maintains a data structure that records instances of potentially non-deterministic events that occur when the operations are performed on the region of memory.