Adaptive impedance matching (AIM) for electrically small radio receiver antennas

1. A method of tuning an antenna circuit, comprising:

(a) receiving a signal on an antenna;

(b) producing a received signal strength indication based on the received signal;

(c) using the received signal strength indication to produce a control voltage;

(d) using the control voltage to control a capacitance in an antenna matching circuit;

(e) changing the control voltage to minimize a ratio of a change in the received signal strength indication to a change in the control voltage; and

(f) repeating steps (a), (b), (c), (d) and (e).

2. The method of claim 1 , wherein the step of using the received signal strength indication to produce the control voltage changes the control voltage by an increment that is adaptively adjusted.

3. The method of claim 2 , wherein the increment is adjusted based on whether there is a control voltage direction change.

4. The method of claim 2 , wherein the polarity of the increment is determined based on a decrease in received signal strength indication.

5. The method of claim 2 , wherein the polarity of the increment is based on whether the control voltage has reached a minimum limit or a maximum limit.

6. The method of claim 2 , wherein the step of using the received signal strength indication to produce the control voltage changes the control voltage by multiplying the control voltage by an increase factor or a decrease factor, wherein the increase factor and the decrease factor are adaptively controlled.

7. The method of claim 1 , wherein the received signal strength indication is quantized with sufficient coarseness to suppress variations in received signal strength indication noise values.

8. The method of claim 1 , wherein the step of changing the control voltage to minimize a ratio of a change in the received signal strength indication to a change in the control voltage uses an heuristic approximation to minimize the ratio of a change in the received signal strength indication to a change in the control voltage.

9. The method of claim 1 , wherein step (f) is disabled when an automatic gain control adjusts its gain.

10. The method of claim 1 , wherein the step of using the received signal strength indication to produce the control voltage uses an initial control voltage value determined from a previously filtered control voltage value.

11. The method of claim 10 , wherein the initial control voltage value is stored with a channel preset.

12. The method of claim 10 , wherein the initial control voltage value is determined from a known a priori relationship between a tuned frequency and the control voltage.

13. The method of claim 12 , wherein the known a priori relationship between the tuned frequency and the control voltage is updated based on filtered control voltage information for each of a plurality of tuned frequencies.

14. The method of claim 1 , wherein the step of using the control voltage to control a capacitance in an antenna matching circuit comprises:

producing a digital control signal;

applying the digital control signal to a digital-to-analog converter to produce the control voltage; and

applying the control voltage to a varactor.

15. The method of claim 14 , further comprising:

filtering the control voltage prior to applying the control voltage to the varactor.

16. The method of claim 1 , wherein the received signal strength indication is estimated by a baseband processor.

17. The method of claim 1 , wherein the received signal strength indication is estimated by computing an approximately instantaneous power of the received signal in a digital signal processor.

18. The method of claim 1 , wherein the received signal strength indication is estimated by a detector in an analog automatic gain control circuit.

19. The method of claim 1 , wherein the received signal strength indication includes samples that are computed over discrete time intervals.

20. The method of claim 1 , wherein:

the control voltage is updated in a plurality of cycles; and

wherein for each cycle, the received signal strength indication is produced at the start of each cycle, the control voltage is produced, the control voltage is filtered and applied to varactor diodes, a remaining portion of the cycle allows for settling time of control voltage filtering.

21. The method of claim 1 , wherein the received signal strength indication is adjusted using hysteresis.

22. The method of claim 1 , wherein the control voltage is dithered, resulting in variations of the received signal strength indication about its peak value.

23. The method of claim 1 , wherein the received signal strength indication includes samples computed in dB as a log of a sum of energies of received signal samples.

24. The method of claim 1 , wherein the control voltage is varied such that an expected value of a derivative of the received signal strength indication with respect to the control voltage approaches zero.

25. An apparatus, comprising:

an antenna;

a circuit for producing a received signal strength indication based on the received signal;

a processor for using the received signal strength indication to produce a control voltage; and

an antenna matching circuit including a capacitance controlled by the control voltage;

wherein the processor changes the control voltage to maximize signal gain by minimizing a ratio of a change in the received signal strength indication to a change in the control voltage.

26. The apparatus of claim 25 , wherein the processor changes the control voltage by an increment that is adaptively adjusted.

27. The apparatus of claim 26 , wherein the increment is adjusted based on whether there is a control voltage direction change.

28. The apparatus of claim 26 , wherein the polarity of the increment is determined based on a decrease in received signal strength indication.

29. The apparatus of claim 26 , wherein the polarity of the increment is based on whether the control voltage has reached a minimum limit or a maximum limit.

30. The apparatus of claim 25 , wherein the processor multiplies the control voltage by an increase factor or a decrease factor, wherein the increase factor and the decrease factor are adaptively controlled.

31. The apparatus of claim 25 , wherein the received signal strength indication is quantized with sufficient coarseness to suppress variations in received signal strength indication noise values.

32. The apparatus of claim 25 , wherein the processor uses an heuristic approximation to minimize the ratio of a change in the received signal strength indication to a change in the control voltage.

33. The apparatus of claim 25 , wherein the processor uses an initial control voltage value determined from a previously filtered control voltage value.

34. The apparatus of claim 33 , wherein the initial control voltage value is stored with a channel preset.

35. The apparatus of claim 25 , wherein the processor uses an initial control voltage determined from a known a priori relationship between a tuned frequency and the control voltage.

36. The apparatus of claim 35 , wherein the known a priori relationship between the tuned frequency and the control voltage is updated based on filtered control voltage information for each of a plurality of tuned frequencies.

37. The apparatus of claim 25 , further comprising:

a digital-to-analog converter receiving a control signal from the processor and producing the control voltage.

38. The apparatus of claim 37 , further comprising:

a filter for filtering the control voltage.

39. The apparatus of claim 38 , wherein the control voltage is updated in a plurality of cycles and wherein for each cycle, the received signal strength indication is produced at the start of the cycle, the control voltage is produced, the control voltage is filtered and applied to varactor diodes, and a remaining portion of the cycle allows for settling time of control voltage filtering.

40. The apparatus of claim 25 , wherein the processor comprises a baseband processor.

41. The apparatus of claim 25 , wherein the received signal strength indication includes samples computed over discrete time intervals.

42. The apparatus of claim 25 , wherein the received signal strength indication is quantized using hysteresis.

43. An apparatus comprising:

means for receiving a signal on an antenna;

means for producing a received signal strength indication based on the received signal;

means for using the received signal strength indication to produce a control voltage; and

means for using the control voltage to control a capacitance in an antenna matching circuit;

wherein the means for using the received signal strength indication to produce a control voltage changes the control voltage to maximize signal gain by minimizing a ratio of a change in the received signal strength indication to a change in the control voltage.