IP Library Granted Patent US 7,879,637
Granted Patent B2
US 7,879,637 · App. 12/334,015 · Granted Feb 1, 2011

CMOS solid-state imaging device and method of manufacturing the same as well as drive method of CMOS solid-state imaging device

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Quick Facts
Patent No.
US 7,879,637
App. No.
12/334,015
Granted
Feb 1, 2011
Kind
B2
Abstract

A CMOS solid-state imaging device configured to restrain the occurrence of white spots and dark current caused by pixel defects, and also to increase the saturation signal amount. Adjacent pixels are separated by an element isolation portion formed of a diffusion layer and an insulating layer thereon, and the insulating layer of the element isolation portion is formed in a position equal to or shallower than the position of a pn junction on the side of an accumulation layer of a photoelectric conversion portion 38 constituting a pixel.

Claims (15)

1. A method of manufacturing a CMOS solid-state imaging device in which adjacent pixels are separated by element isolation portion formed of a diffusion layer and an insulating layer thereon

comprising the processes of:

depositing a silicon nitride film on a substrate and forming an opening in a portion of said silicon nitride film where element isolation should be formed;

forming a silicon oxide film within said opening; and

removing said silicon nitride film and forming an insulating layer of said element isolation portion using said silicon oxide film whose surface protrudes from said substrate surface.

2. A method of manufacturing a CMOS solid-state imaging device according to claim 1 ,

wherein in the process of forming a silicon oxide film within said opening, after a silicon oxide film is formed on said silicon nitride film to be buried in said opening, said silicon oxide film is planarized.

3. A method of manufacturing a CMOS solid-state imaging device according to claim 1 ,

wherein in the process of forming a silicon oxide film within said opening, a silicon oxide film is formed by locally oxidizing a silicon substrate facing the inside of said opening.

4. A method of manufacturing a CMOS solid-state imaging device according to claim 1 ,

further comprising the process of performing ion implantation into a substrate immediately under said opening for element isolation, after forming said opening.

5. A method of manufacturing a CMOS solid-state imaging device according to claim 1 ,

wherein before said silicon oxide film is formed, a charge-accumulation region of a photoelectric conversion portion is formed by ion implantation.

6. A method of driving a CMOS solid-state imaging device having a plurality of pixels, adjacent ones of which are separated by element isolation portion formed of a diffusion layer and an insulating layer thereon,

wherein each of said plurality of pixels is driven where at least the electrical potential of a source drain region of a transistor of another pixel adjacent to a photoelectric conversion portion of a pixel with said element isolation portion in between is set to the potential not becoming 0V in a charge-accumulation period in which charges are accumulated in said photoelectric conversion portion.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 19, 2016
From: SONY CORPORATION
To: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Reel/Frame 040419/0001 →