Noise filter circuit, dead time circuit, delay circuit, noise filter method, dead time method, delay method, thermal head driver, and electronic instrument
View Patent ↗A noise filter circuit includes a first inverter circuit that receives a signal based on an input signal, a second inverter circuit that receives a signal based on the input signal, and a latch circuit that receives signals based on a signal output from the first inverter circuit and a signal based on a signal output from the second inverter circuit as a set signal and a reset signal. Each of the first inverter circuit and the second inverter circuit includes a first-conductivity-type transistor and a second-conductivity-type transistor, the capability of one of the first-conductivity-type transistor and the second-conductivity-type transistor being lower than the capability of the other of the first-conductivity-type transistor and the second-conductivity-type transistor.
1. A noise filter circuit comprising:
a first inverter circuit that receives a signal based on an input signal, the first inverter circuit generating a first signal with a delay amount based on the input signal, a rise time of the first signal being longer than a fall time of the first signal;
a second inverter circuit that receives a signal based on the input signal, the second inverter circuit generating a second signal with the delay amount based on the input signal, a rise time of the second signal being longer than a fall time of the second signal;
a latch circuit that receives signals based on the first signal and the second signal as a set signal and a reset signal, the latch circuit removing a noise having a pulse width smaller than the delay amount;
one of the first inverter circuit and the second inverter circuit including a P-type transistor and an N-type transistor, the capability of the P-type transistor being lower than the capability of the N-type transistor; and
the other of the first inverter circuit and the second inverter circuit including a P-type transistor and an N-type transistor, the capability of the P-type transistor being lower than the capability of the N-type transistor.
2. A thermal head driver comprising the noise filter circuit as defined in claim 1 .
3. An electronic instrument comprising the noise filter circuit as defined in claim 1 .
4. A noise filter circuit comprising:
a first inverter circuit that receives a signal based on an input signal, the first inverter circuit generating a first signal with a delay amount based on the input signal, a fall time of the first signal being longer than a rise time of the first signal;
a second inverter circuit that receives a signal based on the input signal, the second inverter circuit generating a second signal with the delay amount based on the input signal, a fall time of the second signal being longer than a rise time of the second signal;
a latch circuit that receives signals based on the first signal and the second signal as a set signal and a reset signal, the latch circuit removing a noise having a pulse width smaller than the delay amount;
one of the first inverter circuit and the second inverter circuit including a P-type transistor and an N-type transistor, the capability of the N-type transistor being lower than the capability of the P-type transistor; and
the other of the first inverter circuit and the second inverter circuit including a P-type transistor and an N-type transistor, the capability of the N-type transistor being lower than the capability of the P-type transistor.
5. A thermal head driver comprising the noise filter circuit as defined in claim 4 .
6. An electronic instrument comprising the noise filter circuit as defined in claim 4 .