IP Library Granted Patent US 9,130,747
Granted Patent B2
US 9,130,747 · App. 12/336,009 · Granted Sep 8, 2015

Software radio frequency canceller

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Quick Facts
Patent No.
US 9,130,747
App. No.
12/336,009
Granted
Sep 8, 2015
Kind
B2
Abstract

A full-duplex RF communication system and corresponding methods use digital adaptive filters for interference cancellation. As provided, the techniques allow full-duplex radio frequency communication without frequency-, time-, or code-division multiplexing and without the use of hardware RF cancellers. Such techniques may be useful for wireless communication, such as cellular communication, radio communication, broadcasting, short-range point-to-point communication, wireless sensor networks, and wireless computer networks.

Claims (124)

1. A method comprising:

receiving an analog primary signal from a radio receiver input port, an antenna, or a receiver front end;

receiving an analog reference signal locally generated and transmitted by a radio transmitter, wherein the radio transmitter is co-located with the radio receiver;

converting the analog primary signal into a digital primary signal; converting the analog reference signal into a digital reference signal; and processing the digital reference signal with a dual loop digital adaptive filter, wherein a first adaptive filter of the dual loop digital adaptive filter uses the output of a second adaptive filter of the dual loop digital adaptive filter as one of the inputs for determining filter weights, to provide an output; and

subtracting the direct output of the first adaptive filter of the dual loop digital adaptive filter from the digital primary signal to generate a digital cancelled signal.

2. The method of claim 1 , comprising separating bands of one or both of the digital primary signal or the digital reference signal prior to processing the digital primary and digital reference signals with two or more dual loop digital adaptive filters.

3. The method of claim 1 , comprising downconverting the digital primary signal and the digital reference signal to inphase and quadature components prior to processing the digital primary and digital reference signals with two dual loop digital adaptive filters.

4. The method of claim 1 , comprising downconverting and demodulating the digital primary signal and the digital reference signal prior to processing the digital primary and digital reference signals with the dual loop digital adaptive filter.

5. The method of claim 1 , wherein converting the analog primary signal into a digital primary signal comprises using a high speed analog to digital converter.

6. The method of claim 1 , wherein converting the analog reference signal into a digital reference signal comprises using a high speed analog to digital converter.

7. The method of claim 1 , wherein processing the digital primary signal with the dual loop digital adaptive filter comprises subtracting an estimate of crosstalk from the digital reference signal to provide a second input to determine filter weights.

8. A device programmed with machine-readable instructions for:

receiving an analog primary signal from a radio receiver input port, an antenna, or a receiver front end;

receiving an analog reference signal locally generated and transmitted by a radio transmitter, wherein the radio transmitter is co-located with the radio receiver;

converting the analog primary signal into a digital primary signal; converting the analog reference signal into a digital reference signal; and

processing the digital reference signal with a dual loop digital adaptive filter, wherein a first adaptive filter of the dual loop digital adaptive filter uses the output of a second adaptive filter of the dual loop digital adaptive filter as one of the inputs for determining filter weights, to provide an output; and

subtracting the direct output of the first adaptive filter of the dual loop digital adaptive filter from the digital primary signal to generate a digital cancelled signal.

9. The device of claim 8 , wherein the dual loop adaptive filter comprises a first adaptive filter comprising the following equation:

r

^

(

i

)

=

r

(

i

)

-

k

=

0

M

-

1

a

(

k

)

t

(

i

-

k

)

wherein {circumflex over (r)}(i) are the output samples, r(i) are the receiver input port samples, t(i) are the transmitter input port samples, M is the length of the adaptive filter, and a(k) are the adaptive filter tap weights.

10. The device of claim 9 , wherein the dual loop adaptive filter comprises a second adaptive filter comprising the following equation:

r

~

(

i

)

=

k

=

0

M

-

1

b

(

k

)

r

^

(

i

-

k

)

wherein b(k) are the adaptive filter tap weights.

11. The device of claim 9 , wherein the filter tap weights of the first filter are updated according to the following equation:

a i ( k )= a i-1 ( k )+2μ{circumflex over (r)}( i )[ t ( i−k )−{tilde over ( r )}( i−k )]

where a i (k) is an updated filter tap weight estimate and a i-1 (k) is a previous estimates of filter taps a(k).

12. The device of claim 8 , comprising instructions for separating bands of one or both of the digital primary signal or the digital reference signal prior to processing the digital primary and reference signals with two or more dual loop digital adaptive filters.

13. The device of claim 8 , comprising instructions for downconverting the digital primary signal and the digital reference signal to inphase and quadature components prior to processing the inphase and quadature components of digital primary and reference signals with two dual loop digital adaptive filters.

14. The device of claim 8 , comprising instructions for downconverting and demodulating the digital primary signal and the digital reference signal prior to processing the digital primary and reference signals with the dual loop digital adaptive filter.

15. The device of claim 8 , wherein converting the analog primary signal into a digital primary signal comprises using a high speed analog to digital converter.

16. The device of claim 8 , wherein converting the analog reference signal into a digital reference signal comprises using a high speed analog to digital converter.

17. The device of claim 8 , wherein the machine-readable instructions comprise an upgrade package.

18. A full-duplex wireless communication system comprising:

a receiver input port, antenna, or receiver front end configured to receive an analog primary signal;

a transmitter configured to transmit an analog transmitted signal;

a directional coupler configured to sample a portion of the analog transmitted signal to provide an analog reference signal;

a first analog to digital converter configured to convert the analog primary signal into a digital primary signal;

a second analog to digital converter configured to convert the analog reference signal into a digital reference signal; and

a processor comprising instructions for:

processing the digital reference signal with a dual loop digital adaptive filter, wherein a first adaptive filter of the dual loop digital adaptive filter uses the output of a second adaptive filter of the dual loop digital adaptive filter as one of the inputs for determining filter weights, to provide an output; and

subtracting the direct output of the first adaptive filter of the dual loop digital adaptive filter from the digital primary signal to generate a digital cancelled signal.

19. The system of claim 18 , wherein the processor comprises instructions for separating bands of one or both of the digital primary signal or the digital reference signal prior to processing the digital primary and reference signals with two or more dual loop digital adaptive filters.

20. The system of claim 18 , comprising one or more downconverters and demodulators for downconverting and demodulating the digital primary signal and the digital reference signal prior to processing the digital primary and reference signals with the dual loop digital adaptive filter.

21. The system of claim 18 , wherein one or both of the first analog to digital converter or the second analog to digital converter comprises a high speed analog to digital converter.

22. The system of claim 18 , wherein the system does not comprise a hardware canceller configured to process the analog primary signal.

23. The system of claim 18 , wherein the system comprises a cellular communication system.

24. The system of claim 18 , wherein the system is part of a network, comprising a plurality of the full-duplex wireless communications systems.

25. The system of claim 18 , comprising a bypass switch configured to bypass the digital adaptive filter and passing the digital primary signal directly to a receiver.

26. A full-duplex wireless communication system comprising:

a receiver input port, antenna, or receiver front end capable of receiving an analog primary signal;

a transmitter configured to transmit an analog transmitted signal;

a directional coupler configured to sample a portion of the analog transmitted signal to provide an analog reference signal;

a first analog to digital converter configured to convert the analog primary signal into a digital primary signal;

a second analog to digital converter configured to convert the analog reference signal into a digital reference signal; and

a processor configured to execute instructions for:

processing the digital reference signal with a first digital adaptive filter to provide a first output;

subtracting the first output of the first digital adaptive filter from the digital primary signal to generate a first filtered signal; and

processing the first filtered signal with a second digital adaptive filter to provide a second output, wherein the second output of the second digital adaptive filter is used as an input for determining filter weights of the first digital adaptive filter.

27. The system of claim 26 , wherein the processor comprises instructions for subtracting the second output from the digital reference signal to provide an input for determining filter weights of the second digital adaptive filter.

28. The system of claim 26 , wherein the system does not comprise time-division, frequency-division, or code-division multiplexed signal processing.

29. The system of claim 26 , wherein the system does not comprise a hardware canceller configured to process the analog primary signal.

Assignments (5)
QUITCLAIM ASSIGNMENT Recorded Sep 18, 2025
From: EDISON INNOVATIONS LLC
To: BLUE RIDGE INNOVATIONS, LLC
Reel/Frame 072938/0793 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 26, 2025
From: GENERAL ELECTRIC COMPANY
To: GE INTELLECTUAL PROPERTY LICENSING, LLC
Reel/Frame 070636/0815 →
CHANGE OF NAME Recorded Mar 26, 2025
From: GE INTELLECTUAL PROPERTY LICENSING, LLC
To: DOLBY INTELLECTUAL PROPERTY LICENSING, LLC
Reel/Frame 070643/0907 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 20, 2025
From: DOLBY INTELLECTUAL PROPERTY LICENSING, LLC
To: EDISON INNOVATIONS, LLC
Reel/Frame 070293/0273 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 16, 2008
From: ZINSER, RICHARD LOUIS; HARTMAN, MICHAEL JAMES; HERSHEY, JOHN ERIK; ROSS, JOHN ANDERSON FERGUS
To: GENERAL ELECTRIC COMPANY
Reel/Frame 021988/0154 →