IP Library Granted Patent US 8,008,912
Granted Patent B1
US 8,008,912 · App. 12/336,218 · Granted Aug 30, 2011

Method and system for testing P2 stiffness of a magnetoresistance transducer at the wafer level

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Quick Facts
Patent No.
US 8,008,912
App. No.
12/336,218
Granted
Aug 30, 2011
Kind
B1
Abstract

A method of testing P 2 stiffness of a magnetoresistance (MR) sensor stack including a P 2 pinned layer is provided. The method comprises the step of applying an external magnetic field to the MR sensor stack. The external magnetic field is oriented substantially perpendicular to a magnetic field of the P 2 pinned layer. The method further comprises varying an amplitude of the external magnetic field, measuring a change in a resistance of the MR sensor stack in response to the varying amplitude of the external magnetic field, and calculating the P 2 stiffness based on the measured change in resistance.

Claims (60)

1. A method of testing P 2 stiffness of a magnetoresistance MR sensor stack including a P 2 pinned layer, comprising the steps of:

applying an external magnetic field to the MR sensor stack, the external magnetic field oriented substantially perpendicular to a magnetic field of the P 2 pinned layer;

varying an amplitude of the external magnetic field;

measuring a change in a resistance of the MR sensor stack in response to the varying amplitude of the external magnetic field; and

calculating the P 2 stiffness based on the measured change in resistance.

2. The method according to claim 1 , wherein the MR sensor stack comprises:

a free layer,

a barrier layer,

a synthetic antiferromagnetic layer including a P 1 pinning layer, the P 2 pinned layer and a spacer layer separating the P 1 pinning layer and the P 2 pinned layer,

an antiferromagnetic layer, and

a seed layer.

3. The method according to claim 2 , wherein measuring the change in the resistance comprises measuring a change in resistance of a circuit path passing through the free layer, the barrier layer, the synthetic antiferromagnetic layer, the antiferromagnetic layer and the seed layer.

4. The method according to claim 1 , wherein the external magnetic field is oriented substantially parallel to a magnetic field of a hard bias layer disposed adjacent to the MR sensor stack.

5. The method according to claim 1 , wherein the amplitude of the external magnetic field is varied between about −50% and 50% of a coercivity of a hard bias layer adjacent to the MR sensor stack.

6. The method according to claim 1 , wherein the amplitude of the external magnetic field is varied between about −1000 oersted and 1000 oersted.

7. The method according to claim 1 , wherein measuring the change in the resistance of the MR sensor stack comprises measuring a change in the conductance of the MR sensor stack.

8. The method according to claim 1 , wherein calculating the P 2 stiffness comprises solving for H P2S , where:

H

P

2

S

=

R

l

-

1

-

R

h

-

1

R

2

-

1

-

R

1

-

1

(

H

2

-

H

1

)

,

where R l is a minimum measured resistance value, R h is a maximum measured resistance value, R 1 and R 2 are first and second resistance values measured in range of substantially linearly varying resistance, and H 1 and H 2 are first and second amplitudes of the external magnetic field corresponding to R 1 and R 2 .

9. The method according to claim 8 , wherein the MR sensor stack has a track width and a stripe height configured such that R l and R h are within a predetermined measurable range.

10. The method according to claim 1 , wherein the MR sensor stack is a test structure with a track width of about 0.4 μm and a stripe height of about 2 μm.

11. The method according to claim 10 , wherein the test structure includes two or more contact points for measuring the change in the resistance of the MR sensor stack.

12. The method according to claim 10 , wherein the test structure is disposed in a test region of a wafer in which are also disposed one or more MR heads.

13. The method according to claim 1 , wherein the P 2 stiffness of the MR sensor stack is tested following the deposition of contact points on a wafer including the MR sensor stack.

14. The method according to claim 1 , wherein the P 2 stiffness of the MR sensor stack is tested after a wafer including the MR sensor stack has been sliced into one or more bars.

15. The method according to claim 1 , wherein the MR sensor stack is a tunneling magnetoresistance (TMR) sensor stack.

Assignments (7)
RELEASE OF SECURITY INTEREST AT REEL 038710 FRAME 0845 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL (FREMONT), LLC; WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058965/0445 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 19, 2019
From: WESTERN DIGITAL (FREMONT), LLC
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 050450/0582 →
RELEASE OF SECURITY INTEREST Recorded Mar 5, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: WESTERN DIGITAL (FREMONT), LLC
Reel/Frame 045501/0158 →
SECURITY AGREEMENT Recorded May 16, 2016
From: WESTERN DIGITAL (FREMONT), LLC
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038744/0755 →
SECURITY AGREEMENT Recorded May 16, 2016
From: WESTERN DIGITAL (FREMONT), LLC
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 038710/0845 →
SECURITY AGREEMENT Recorded May 16, 2016
From: WESTERN DIGITAL (FREMONT), LLC
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038744/0675 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 5, 2009
From: SHANG, CHANGHE
To: WESTERN DIGITAL (FREMONT), LLC
Reel/Frame 022213/0436 →