IP Library Granted Patent US 8,049,487
Granted Patent B2
US 8,049,487 · App. 12/338,235 · Granted Nov 1, 2011

Power measurement circuit

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Quick Facts
Patent No.
US 8,049,487
App. No.
12/338,235
Granted
Nov 1, 2011
Kind
B2
Abstract

A power measurement circuit and method are described. The circuit comprises: a transconductance rectifier arrangement including an input and configured to receive a periodically varying input voltage signal having an approximate 50% duty cycle; and an averaging filter for producing a time averaged DC output signal proportional to the mean square of the voltage at the input of the transconductance rectifier arrangement and representative of the average power of the input voltage signal within a range of voltages at the input.

Claims (22)

1. A single-ended, input power measurement circuit for measuring the power of a periodically varying input voltage signal having an approximate 50% duty cycle, the circuit comprising:

a single-ended transconductance rectifier arrangement with square-law conformance, the rectifier arrangement including an input configured to receive the periodically varying input voltage signal; and

an averaging filter coupled to the single-ended rectifier arrangement and arranged and configured to produce a time averaged DC output signal proportional to the mean square of the voltage at the input of the transconductance rectifier arrangement and representative of the average power of the input voltage signal within a range of voltages at the input.

2. A power measurement circuit according to claim 1 , wherein the averaging filter includes a RC filter.

3. A power measurement circuit according to claim 1 , wherein the averaging filter includes an RC filter for producing a time averaged DC output voltage signal as a function of the output current of the transconductance rectifier arrangement and representative of the average power of the input voltage signal within a range of input voltage signals.

4. A power measurement circuit according to claim 1 , further including a DC bias impedance arrangement configured to apply a DC bias to the input of the transconductance rectifier arrangement and configured to prevent shorting of the periodically varying input voltage signal.

5. A power measurement circuit according to claim 1 , wherein the transconductance rectifier arrangement includes a first rectifier element coupled to the averaging filter and configured so as to generate a first output voltage representing (a) the mean square voltage at the input of the transconductance rectifier arrangement and (b) a reference voltage, and a second rectifier element coupled to an impedance and configured so as to generate a second output voltage representing the reference voltage, the power measurement circuit further including an output for providing an output signal representing the mean square voltage as a function of the difference between the first output voltage and the second output voltage.

6. A power measurement circuit according to claim 5 , further including (a) a current mirror including one transistor element arranged so as to generate a first reference current, and (b) at least one other transistor element forming the first rectifier element of the transconductance rectifier arrangement so that a reference current is generated through the first rectifier element that is directly proportional to the first reference current.

7. A power measurement circuit according to claim 5 , wherein the first and second rectifier elements each form a first stage, and wherein the power measurement circuit further includes at least one additional rectifier element coupled to each of the first and second rectifier elements so that each forms a respective second stage so as to extend the range of input voltage signals in which the time average DC output signal is proportional to the mean square of the voltage at the input of the transconductance rectifier arrangement and representative of the average power of the input voltage signal.

8. A power measurement circuit according to claim 7 , further including an offset voltage source coupled between each of the first rectifier and the second rectifier elements of the first stage on the one hand, and each of the corresponding rectifier elements of the second stage on the other hand.

9. A power measurement circuit according to claim 1 , wherein the transconductance rectifier arrangement includes a common emitter transconductance rectifier.

10. A power measurement circuit according to claim 1 , wherein the transconductance rectifier arrangement includes a common base transconductance rectifier.

11. A power measurement circuit according to claim 1 , wherein the transconductance rectifier arrangement includes a npn transconductance rectifier.

12. A power measurement circuit according to claim 1 , wherein the transconductance rectifier arrangement includes a pnp transconductance rectifier.

13. A power measurement circuit according to claim 1 , wherein the transconductance rectifier arrangement includes a p-channel MOSFET transconductance rectifier.

14. A power measurement circuit according to claim 1 , wherein the transconductance rectifier arrangement includes a n-channel MOSFET transconductance rectifier.

15. A power measurement circuit according to claim 1 , wherein the transconductance rectifier arrangement includes a p-channel JFET transconductance rectifier.

16. A power measurement circuit according to claim 1 , wherein the transconductance rectifier arrangement includes a n-channel JFET transconductance rectifier.

17. A power measurement circuit according to claim 1 , wherein the transconductance rectifier arrangement includes a p-channel MESFET transconductance rectifier.

18. A power measurement circuit according to claim 1 , wherein the transconductance rectifier arrangement includes a n-channel MESFET transconductance rectifier.

19. A method of measuring power of a periodically varying input voltage signal having an approximate 50% duty cycle with a circuit comprising a transconductance rectifier arrangement including a single-ended input configured to receive the periodically varying input voltage signal, the method comprising:

producing a time averaged DC output signal proportional to the mean square of the periodically varying input voltage signal at the input of the transconductance rectifier arrangement so that the time averaged DC output signal is representative of the average power of the input voltage signal within a range of voltages at the input.

Assignments (3)
CHANGE OF NAME Recorded Sep 4, 2021
From: LINEAR TECHNOLOGY CORPORATION
To: LINEAR TECHNOLOGY LLC
Reel/Frame 057421/0543 →
CHANGE OF NAME Recorded Sep 4, 2021
From: LINEAR TECHNOLOGY LLC
To: ANALOG DEVICES INTERNATIONAL UNLIMITED COMPANY
Reel/Frame 057423/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 18, 2008
From: MYERS, JOHN P
To: LINEAR TECHNOLOGY CORPORATION
Reel/Frame 022002/0668 →