Hybrid surface mountable packages for very high speed integrated circuits
View Patent ↗In one example, a hybrid surface mountable package includes a housing at least partially defining a sealed cavity, two microwave integrated circuits (MIC) chips positioned inside the sealed cavity, and a very-high-speed interconnect connecting the two MIC chips to each other. The very-high-speed interconnect includes strong coupling co-planar waveguide (CPWG) transmission lines.
1. A hybrid surface mountable package comprising:
a housing at least partially defining a sealed cavity;
two microwave integrated circuits (MIC) chips positioned inside the sealed cavity; and
a very high-speed interconnect connecting the MIC chips to each other, the very high-speed interconnect comprising strong coupling co-planar waveguide (CPWG) transmission lines, wherein the CPWG transmission lines are integrated into a multilayer ceramic board and each layer of the multilayer ceramic board is a high temperature co-fired ceramic (HTCC) having a thickness of about 500 um.
2. The hybrid surface mountable package as recited in claim 1 , wherein the width of a trace in the CPWG transmission lines is between about 0.2 mm and about 0.3 mm.
3. The hybrid surface mountable package as recited in claim 1 , wherein the width of a gap between traces in the CPWG transmission lines is between about 0.095 mm and about 0.18 mm.
4. A hybrid surface mountable package comprising:
a housing at least partially defining a sealed cavity;
two MIC chips positioned inside the sealed cavity;
two microwave connectors positioned outside the cavity; and
a very high-speed interconnect connecting the MIC chips to the microwave connectors, the very high-speed interconnect comprising:
a strong coupling wall feed thru extending through the housing;
first strong coupling CPWG transmission lines connecting the feed thru to the microwave connectors; and
second strong coupling CPWG transmission lines connecting the feed thru to the MIC chips, wherein the CPWG transmission lines are integrated into a multilayer ceramic board, with each layer of the multilayer ceramic board being formed from a HTCC having a thickness of about 500 um, a dielectric constant of about 9.2, and a tangent loss of about 0.00015.
5. The hybrid surface mountable package as recited in claim 4 , further comprising:
a grid array positioned outside the cavity; and
a high-speed interconnect between the grid array and the MIC chips.
6. The hybrid surface mountable package as recited in claim 4 , wherein the width of a trace in the CPWG transmission lines is between about 0.2 mm and 0.3 mm and the width of a gap between traces in the CPWG transmission lines is between about 0.095 mm and about 0.18 mm.
7. The hybrid surface mountable package as recited in claim 4 , wherein the width of a trace in the feed thru is about 0.09 mm and the width of a gap between traces in the feed thru is about 0.095 mm.
8. The hybrid surface mountable package as recited in claim 4 , wherein the very high-speed interconnect comprises a ground-signal-ground (GSG) structure configured to carry single-ended signals.
9. A hybrid surface mountable package comprising:
a first housing at least partially defining a first sealed cavity;
a second housing at least partially defining a second sealed cavity;
first MIC chips positioned inside the first sealed cavity;
second MIC chips positioned inside the second sealed cavity;
two microwave connectors positioned outside the cavity; and
a very high-speed interconnect connecting the MIC chips to the microwave connectors, the very high-speed interconnect comprising:
a first strong coupling wall feed thru connecting the first MIC chips and the second MIC chips through the first housing and the second housing;
a second strong coupling wall feed thru extending through the second housing;
first strong coupling CPWG transmission lines connecting the second feed thru to the microwave connectors; and
second strong coupling CPWG transmission lines connecting the second feed thru to the second MIC chips, wherein the CPWG transmission lines are integrated into a multilayer ceramic board, with each layer of the multilayer ceramic board being formed from a HTCC having a thickness of about 500 um, a dielectric constant of about 9.2, and a tangent loss of about 0.00015.
10. The hybrid surface mountable package as recited in claim 9 , further comprising:
a grid array positioned outside the cavity that is configured to carry high-speed, power, and ground signals; and
a high-speed interconnect between the grid array and the first and second MIC chips.
11. The hybrid surface mountable package as recited in claim 9 , wherein the width of a trace in the CPWG transmission lines is about 0.2 mm and the width of a gap between traces in the CPWG transmission lines is about 0.095 mm.
12. The hybrid surface mountable package as recited in claim 9 , wherein the width of a trace in the feed thru is about 0.09 mm and the width of a gap between traces in the feed thru is about 0.095 mm.
13. The hybrid surface mountable package as recited in claim 9 , wherein the very high-speed interconnect comprises a GSG structure configured to carry single-ended signals.