Semiconductor device and manufacturing method thereof
View Patent ↗A method of manufacturing a semiconductor device including forming a first conductive-type buried layer in a substrate; forming a first conductive-type drift area on the first conductive-type buried layer; forming a gate insulating layer and gate electrodes by selectively removing the first conductive-type drift area; forming a first oxide layer on the substrate and gate electrodes; implanting second conductive-type impurity ions into the substrate; forming a nitride layer on the first oxide layer; forming a second conductive-type well by diffusing the second conductive-type impurity ions while forming a second oxide layer; removing the nitride layer, the second oxide layer, and portions of the first oxide layer; forming first conductive-type source areas at sides of the gate electrode(s); forming a dielectric layer on the oxide layer; forming a trench in the dielectric layer and the oxide layer; forming a source contact in the trench; and forming a drain.
1. A method of manufacturing a semiconductor device, the method comprising the steps of:
forming a first conductive-type buried layer in a semiconductor substrate and forming a first conductive-type drift area on the first conductive-type buried layer;
forming a gate insulating layer and gate electrodes by selectively removing the first conductive-type drift area;
forming a first oxide layer on the semiconductor substrate including the gate electrodes;
implanting second conductive-type impurity ions into the semiconductor substrate including the first oxide layer;
forming a nitride layer on the first oxide layer;
forming a second conductive-type well by diffusing the second conductive-type impurity ions and simultaneously forming a second oxide layer on the nitride layer;
removing the nitride layer and the second oxide layer from the first oxide layer;
forming a thin oxide layer by partially removing the first oxide layer;
forming first conductive-type source areas at sides of each gate electrode;
forming a dielectric layer on the thin oxide layer;
forming a trench by selectively etching the dielectric layer and the thin oxide layer;
forming a source contact in the trench; and
forming a drain electrode layer electrically connected with the first conductive-type buried layer.
2. The method as in claim 1 , wherein the nitride layer has thickness of 50±10 Å.
3. The method as in claim 1 , wherein the first and/or second oxide layer is removed using a mixture of deionized water and HF.
4. The method as in claim 1 , wherein the nitride layer is removed using a phosphoric acid solution.
5. The method as in claim 1 , wherein the second oxide layer and the nitride layer are simultaneously removed using a BHF (Buffered HF) solution.
6. The method as in claim 1 , wherein the oxide layer has a thickness of about 180±30 Å.
7. The method as in claim 1 , wherein the gate electrodes comprise polysilicon.
8. The method as in claim 1 , wherein the first conductive-type source areas are formed on opposite sides of each gate electrode.
9. The method as in claim 1 , wherein removing the first oxide layer comprises removing a partial thickness of the first oxide layer by wet etching.
10. The method as in claim 9 , wherein the first oxide layer is partially removed using a mixture of deionized water and HF.
11. The method as in claim 1 , wherein the source contact is formed by depositing a first metal layer using a CVD process, blanket-etching the first metal layer, and depositing a second metal layer on the blanket-etched first metal layer.
12. The method as in claim 11 , wherein the first metal layer comprises tungsten and the second metal layer comprises aluminum.