IP Library Granted Patent US 7,738,041
Granted Patent B2
US 7,738,041 · App. 12/341,821 · Granted Jun 15, 2010

Video signal processor and video signal processing method

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,738,041
App. No.
12/341,821
Granted
Jun 15, 2010
Kind
B2
Abstract

According to one embodiment, a video signal processor has a moving block determining module, a vertical edge detector, a moving block number counter, a moving field determining module, a pulldown pattern detector, and a pulldown signal determining module. The moving block determining module divides each field configuring an input video signal into a plurality of blocks, and determines a motion of a block within the plurality of blocks, the block of which the motion is determined having a same spatial position within two fields adjacent to each other. The vertical edge detector detects a vertical edge within each of the plurality of blocks in the each field. The moving block number counter counts a number of moving blocks excluding a block having the vertical edge within a screen based on the detection result of the vertical edge detector and the determination result of the moving block determining module. The moving field determining module determines a motion between the each field based on the counting result of the moving block number counter. The pulldown pattern detector detects a 2:2 pulldown pattern based on the determination result of the moving field determining module. The pulldown signal determining module determines whether the input video signal is a 2:2 pulldown signal depending on the detection result of the pulldown pattern detector.

Claims (43)

1. A video signal processor comprising:

a moving block determining module that divide each field configuring an input video signal into a plurality of blocks, and determine a motion of a block within the plurality of blocks between two fields adjacent to each other, the block of which the motion is determined having a same spatial position within the two fields adjacent to each other;

a vertical edge detector that detects a vertical edge within each of the plurality of blocks in the each field;

a moving block number counter that counts, among the blocks within a screen determined to have the motion by the moving block determining module, a number of blocks in which the vertical edge is not detected in the two fields, based on the detection result of the vertical edge detector and the determination result of the moving block determining module;

a moving field determining module that determines a motion between the each field based on the counting result of the moving block number counter;

a pulldown pattern detector that detects a 2:2 pulldown pattern based on the determination result of the moving field determining module; and

a pulldown signal determining module that determines whether the input video signal is a 2:2 pulldown signal depending on the detection result of the pulldown pattern detector.

2. A video signal processor comprising:

a moving block determining module that divides each field configuring an input video signal into a plurality of blocks, and determines a motion of a block within the plurality of blocks between two fields adjacent to each other, the block of which the motion is determined having a same spatial position within the two fields adjacent to each other;

a vertical edge detector that detects a vertical edge within each of the plurality of blocks in the each field;

a first moving block number counter that counts, among the blocks within a screen determined to have the motion by the moving block determining module, a number of blocks in which the vertical edge is not detected in the two fields, based on the detection result of the vertical edge detector and the determination result of the moving block determining module;

a second moving block number counter that counts a number of all blocks within the screen determined to have the motion by the moving block determining module, based on the determination result of the moving block determining module;

a first moving field determining module that determines a motion between the each field based on the counting result of the first moving block number counter;

a second moving field determining module that determines a motion between the each field based on the counting result of the second moving block number counter;

a first pulldown pattern detector that detects a 2:2 pulldown pattern based on the determination result of the first moving field determining module;

a second pulldown pattern detector that detects a 2:2 pulldown pattern based on the determining result of the second moving field determining module; and

a pulldown signal determining module that determines whether the input video signal is a 2:2 pulldown signal based on the detection result of the first pulldown pattern detector and the detection result of the second pulldown pattern detector.

3. The video signal processor according to claim 1 , wherein

the pulldown signal determining module determines that the input video signal is not the 2:2 pulldown signal when the detection result of the pulldown pattern detector indicates non-detection of the 2:2 pulldown pattern.

4. The video signal processor according to claim 2 , wherein

the pulldown signal determining module determines that the input video signal is not the 2:2 pulldown signal, when the detection result of the first pulldown pattern detector indicates non-detection of the 2:2 pulldown pattern in spite of the detection result of the second pulldown pattern detector.

5. The video signal processor according to claim 2 , wherein

the pulldown signal determining module determines that the input video signal is the 2:2 pulldown signal when the detection result of the first pulldown pattern detector and the detection result of the second pulldown pattern detector both indicate detection of the 2:2 pulldown pattern.

6. The video signal processor according to claim 1 , wherein

the vertical edge detector determines that the vertical edge is present when the edges having a difference absolute value between longitudinally positioned pixels that exceeds an edge determination threshold value used to detect the vertical edge is sequential over a determined range, so as to detect the vertical edge.

7. The video signal processor according to claim 2 , wherein

the vertical edge detector determines that the vertical edge is present when the edges having a difference absolute value between longitudinally positioned pixels that exceeds an edge determination threshold value used to detect the vertical edge is sequential over a determined range, so as to detect the vertical edge.

8. The video signal processor according to claim 1 , further comprising:

an interlaced-to-progressive scanning conversion signal output module that outputs an interlaced-to-progressive scanning conversion signal using an interpolation signal corresponding to the determination result of the pulldown signal determining module.

9. The video signal processor according to claim 2 , further comprising:

an interlaced-to-progressive scanning conversion signal output module that outputs an interlaced-to-progressive scanning conversion signal using an interpolation signal corresponding to the determination result of the pulldown signal determining module.

10. The video signal processor according to claim 8 , further comprising:

a display controller that displays a video on a video display apparatus using the interlaced-to-progressive scanning conversion signal output from the interlaced-to-progressive scanning conversion signal output module.

11. The video signal processor according to claim 9 , further comprising:

a display controller that displays a video on a video display apparatus using the interlaced-to-progressive scanning conversion signal output from the interlaced-to-progressive scanning conversion signal output module.

12. A video signal processing method comprising:

dividing each field configuring an input video signal into a plurality of blocks;

determining a motion of a block within the plurality of blocks between two fields adjacent to each other, the block of which the motion is determined having a same spatial position within the two fields adjacent to each other;

detecting a vertical edge within each of the plurality of blocks in the each field;

counting, among the blocks within a screen determined to have the motion by the determining, a number of blocks in which the vertical edge is not detected in the two fields, based on the determination result of the determining of the motion of the block and the detection result of the detecting of the vertical edge;

determining a motion between the each field based on the counting result of the counting;

detecting a 2:2 pulldown pattern based on the determination result of the determining of the motion between the each field; and

determining whether the input video signal is a 2:2 pulldown signal depending on the detection result of the detecting of the 2:2 pulldown pattern.

Assignments (5)
CHANGE OF NAME Recorded Dec 3, 2021
From: MAXELL HOLDINGS, LTD.
To: MAXELL, LTD.
Reel/Frame 058666/0407 →
MERGER Recorded Nov 29, 2021
From: MAXELL, LTD.
To: MAXELL HOLDINGS, LTD.
Reel/Frame 058255/0579 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 25, 2021
From: HISENSE VISUAL TECHNOLOGY CO., LTD.
To: MAXELL, LTD.
Reel/Frame 056681/0441 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 7, 2020
From: TOSHIBA VISUAL SOLUTIONS CORPORATION
To: HISENSE VISUAL TECHNOLOGY CO., LTD.
Reel/Frame 051493/0333 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 26, 2018
From: KABUSHIKI KAISHA TOSHIBA
To: TOSHIBA VISUAL SOLUTIONS CORPORATION
Reel/Frame 046201/0774 →