IP Library Granted Patent US 8,290,764
Granted Patent B2
US 8,290,764 · App. 12/341,902 · Granted Oct 16, 2012

Virtualization program, simulation apparatus and virtualization method

Assignee: Toshiba Solutions Corporation
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,290,764
App. No.
12/341,902
Granted
Oct 16, 2012
Kind
B2
Abstract

A virtualization program for being able to execute a simulation at high speed, allows a native code simulator to have a stack specific to each task that is managed by a multitask OS. Processes of creation, save, restoration and erasure of a context that a target CPU executes by means of a special control register operation is executed by an API provided by the native code simulator. When porting the multitask OS, the source code is altered so as to call the API. A stack specific to a task is assigned at the API and the stack is switched for switching the task to make context switching possible.

Claims (17)

1. A non-transitory computer-readable medium storing a program that causes a host central processing unit to execute a process for a native code simulation in a host operating system, the process comprising:

in response to starting each of a plurality of tasks executed in a target operating system with multitasking, creating a stack region in the host central processing unit, a register preserving region in the target operating system, and a task state storing region in the target operating system, the native code simulation being a simulation of the target operating system and the plurality of tasks, the stack region storing function call information for each of the plurality of tasks with a last in first out structure in the order of functions to be called sequentially by each of the plurality of tasks, the register preserving region storing most updated register information for each of the plurality of tasks, the most updated register information being a register contents at the last interruption of execution of each of the plurality of tasks, the task state storing region storing a state information for each of the plurality of tasks, the state information showing a state of each of the plurality of tasks;

in response to a transition of a state of any of the plurality of tasks from an execution state to a standby state or from the standby state to the execution state by occurrence of an interrupt or a directive for an interrupt, storing in the register preserving region the most updated register information which is a register contents of a time that a task in the execution state calls a function before the last time that the task calls a function, and also storing in the task state storing region a state information showing a state of the task in the execution state; and

in response to the transition, switching from the task in the execution state to a task in the standby state of the plurality of tasks by storing in the stack region the most updated register information in the task in the standby state to be executed next,

wherein the storing of the most updated register information stores in the register preserving region a value stored in a predetermined register in the host central processing unit as the most updated register information of the task in the execution state, and the predetermined register is provided for each of the plurality of tasks and wherein the switching switches the task in the execution state, by storing in the predetermined register the most updated register information of the task in the standby state.

2. A simulation apparatus comprising:

a host central processing unit,

the host central processing unit is programmed to execute a process for a native code simulation in a host operating system, the process comprising:

in response to starting each of a plurality of tasks executed in a target operating system with multitasking, creating a stack region in the host central processing unit, a register preserving region in the target operating system, and a task state storing region in the target operating system, the native code simulation being a simulation of the target operating system and the plurality of tasks, the stack region storing function call information for each of the plurality of tasks with a last in first out structure in the order of functions to be called sequentially by each of the plurality of tasks, the register preserving region storing most updated register information for each of the plurality of tasks, the most updated register information being a register contents at the last interruption of execution of each of the plurality of tasks, the task state storing region storing a state information for each of the plurality of tasks, the state information showing a state of each of the plurality of tasks;

in response to a transition of a state of any of the plurality of tasks from an execution state to a standby state or from the standby state to the execution state by occurrence of an interrupt or a directive for an interrupt, storing in the register preserving region the most updated register information which is a register contents of a time that a task in the execution state calls a function before the last time that the task calls a function, and also storing in the task state storing region a state information showing a state of the task in the execution state; and

in response to the transition, switching from the task in the execution state to a task in the standby state of the plurality of tasks by storing in the stack region the most updated register information in the task in the standby state to be executed next,

wherein the storing of the most updated register information stores in the register preserving region a value stored in a predetermined register in the host central processing unit as the most updated register information of the task in the execution state, and the predetermined register is provided for each of the plurality of tasks and wherein the switching switches the task in the execution state, by storing in the predetermined register the most updated register information of the task in the standby state.

3. A virtualization method executing a process for a native code simulation in a host operating system, the process comprising:

in response to starting each of a plurality of tasks executed in a target operating system with multitasking, creating a stack region in a host central processing unit, a register preserving region in the target operating system, and a task state storing region in the target operating system, the native code simulation being a simulation of the target operating system and the plurality of tasks, the stack region storing function call information for each of the plurality of tasks with a last in first out structure in the order of functions to be called sequentially by each of the plurality of tasks, the register preserving region storing most updated register information for each the plurality of tasks, the most updated register information being a register contents at the last interruption of execution of each of the plurality of tasks, the task state storing region storing a state information for each of the plurality of tasks, the state information showing a state of each of the plurality of tasks;

in response to a transition of a state of any of the plurality of tasks from an execution state to a standby state or from the standby state to the execution state by occurrence of an interrupt or a directive for an interrupt, storing in the register preserving region the most updated register information which is a register contents of a time that a task in the execution state calls a function before the last time that the task calls a function, and also storing in the task state storing region a state information showing a state of the task in the execution state; and

in response to the transition, switching from the task in the execution state to a task in the standby state of the plurality of tasks by storing in the stack region the most updated register information in the task in the standby state to be executed next,

wherein the storing of the most updated register information stores in the register preserving region a value stored in a predetermined register in the host central processing unit as the most updated register information of the task in the execution state, and the predetermined register is provided for each of the plurality of tasks and wherein the switching switches the task in the execution state, by storing in the predetermined register the most updated register information of the task in the standby state.

Assignments (5)
CHANGE OF CORPORATE NAME AND ADDRESS Recorded Feb 8, 2021
From: TOSHIBA SOLUTIONS CORPORATION
To: TOSHIBA DIGITAL SOLUTIONS CORPORATION
Reel/Frame 055259/0587 →
CORRECTIVE ASSIGNMENT TO CORRECT THE RECEIVING PARTY'S ADDRESS PREVIOUSLY RECORDED ON REEL 048547 FRAME 0098. ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF ADDRESS. Recorded May 28, 2019
From: TOSHIBA SOLUTIONS CORPORATION
To: TOSHIBA SOLUTIONS CORPORATION
Reel/Frame 051297/0742 →
CHANGE OF ADDRESS Recorded Mar 8, 2019
From: TOSHIBA SOLUTIONS CORPORATION
To: TOSHIBA SOLUTIONS CORPORATION
Reel/Frame 048547/0098 →
CHANGE OF NAME Recorded Mar 8, 2019
From: TOSHIBA SOLUTIONS CORPORATION
To: TOSHIBA DIGITAL SOLUTIONS CORPORATION
Reel/Frame 048547/0215 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 23, 2008
From: ISHII, SHOGO; YURA, KOJI
To: TOSHIBA SOLUTIONS CORPORATION
Reel/Frame 022022/0824 →
Priority Claims (1)
JP 2007-335724 · Dec 27, 2007 · national
Continuity (1)
Related Publication 20090171652A1 · Jul 2, 2009