IP Library Granted Patent US 8,249,199
Granted Patent B2
US 8,249,199 · App. 12/342,825 · Granted Aug 21, 2012

Low jitter and high bandwidth clock data recovery

Assignee: Oracle America, Inc.
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Quick Facts
Patent No.
US 8,249,199
App. No.
12/342,825
Granted
Aug 21, 2012
Kind
B2
Abstract

A method of implementing a low jitter and high bandwidth clock and data recovery (CDR) apparatus includes acquiring early, optimal, and late votes; determining which votes are allowed and weighted; disallowing votes not determined to as allowed; weighing votes, wherein votes that would make the CDR move to an extreme of a zero crossing are weighted less; and accumulating votes and adjusting a recovered clock phase based on the accumulated votes. A computer readable medium storing instructions to implement a low jitter and high bandwidth CDR apparatus, the instructions includes functionality to: acquiring early, optimal, and late votes; determining which votes are allowed and weighted; disallowing votes not determined to as allowed; weighing votes, wherein votes that would make the CDR move to an extreme of a zero crossing are weighted less; and accumulating votes and adjust recovered clock phase.

Claims (54)

1. A method of implementing a low jitter and high bandwidth clock and data recovery (CDR) apparatus comprising:

acquiring early votes, optimal votes, and late votes;

determining which of the early votes, optimal votes, and late votes are allowed and weighted based on a criteria;

disallowing the early votes, optimal votes, and late votes not determined as allowed based on the criteria;

weighing the early votes, optimal votes, and late votes determined as allowed based on the criteria, wherein the early votes, optimal votes, and late votes that would make the CDR move to an extreme of a zero crossing are weighted less;

accumulating the allowed and weighted early votes, optimal votes, and late votes and adjusting a recovered clock phase based on the accumulated early votes, optimal votes, and late votes;

adding a lookup table in the CDR, wherein the lookup table comprises weights;

determining which of the early votes, optimal votes, and late votes to weigh; and

applying the weights to the early votes, optimal votes, and late votes, wherein the value of weight to be added or subtracted is looked up in the lookup table.

2. The method of implementing a low jitter and high bandwidth CDR apparatus of claim 1 wherein acquiring the early votes and late votes further comprises:

acquiring the early votes and late votes using bang-bang CDR on serializer/deserializer (SERDES) links.

3. The method of implementing a low jitter and high bandwidth CDR apparatus of claim 1 wherein acquiring the early votes and late votes further comprises:

acquiring the early votes and late votes using Mueller-Muller CDR on analog or digital SERDES links.

4. The method of implementing a low jitter and high bandwidth CDR apparatus of claim 1 wherein determining which of the early votes, optimal votes, and late votes will be allowed and weighted further comprises:

link training all known relevant data patterns.

5. The method of implementing a low jitter and high bandwidth CDR apparatus of claim 4 wherein link training all known relevant data patterns further comprises:

driving all patterns; and

using an eye diagram to determine a location of the zero crossing.

6. The method of implementing a low jitter and high bandwidth CDR apparatus of claim 4 wherein link training all known relevant data patterns further comprises:

driving all patterns; and

determining a recovered clock phase for each repeated data pattern.

7. The method of implementing a low jitter and high bandwidth CDR apparatus of claim 1 wherein determining which of the early votes, optimal votes, and late votes are allowed or weighted further comprises:

leveraging a pulse response measurement capability in the digital SERDES.

8. The method of implementing a low jitter and high bandwidth CDR apparatus of claim 7 wherein leveraging the pulse response measurement capability in the digital SERDES further comprises:

deriving a pulse response from the data through a training sequence; and

determining which data patterns result in outer extremes of a zero crossing through a pulse response eye diagram analysis script using the pulse response.

9. A non-transitory computer readable medium storing instructions to implement a low jitter and high bandwidth CDR apparatus, the instructions comprising functionality to:

acquiring early votes, optimal votes, and late votes;

determining which of the early votes, optimal votes, and late votes are allowed and weighted based on a criteria;

disallowing the early votes, optimal votes, and late votes not determined as allowed based on the criteria;

weighing the early votes, optimal votes, and late votes determined as allowed based on the criteria, wherein the early votes, optimal votes, and late votes that would make the CDR move to an extreme of a zero crossing are weighted less;

accumulating the early votes, optimal votes, and late votes and adjusting a recovered clock phase based on the accumulated the early votes, optimal votes, and late;

adding a lookup table in the CDR, wherein the lookup table comprises weights;

determining which votes to weigh; and

applying the weights to the votes, wherein the value of weight to be added or subtracted is looked up in the lookup table.

10. The non-transitory computer readable medium of claim 9 , wherein acquiring the early votes and late votes further comprises:

acquiring the early votes and late votes using bang-bang CDR on SERDES links.

11. The non-transitory computer readable medium of claim 9 , wherein acquiring the early votes and late votes further comprises:

Acquiring the early votes and late votes using Mueller-Muller CDR on analog or digital SERDES links.

12. The non-transitory computer readable medium of claim 9 , wherein determining which of the early votes, optimal votes, and late votes are allowed and weighted further comprises:

link training all known relevant data patterns.

13. The non-transitory computer readable medium of claim 12 , wherein link training all known relevant data patterns further comprises:

driving all patterns; and

using an eye diagram to determine a location of the zero crossing.

14. The non-transitory computer readable medium of claim 12 , wherein link training all known relevant data patterns further comprises:

driving all patterns; and

determining a recovered clock phase for each repeated data pattern.

15. The non-transitory computer readable medium of claim 9 , wherein determining which of the early votes, optimal votes, and late votes are allowed or weighted further comprises:

leveraging a pulse response measurement capability in the digital SERDES.

16. The non-transitory computer readable medium of claim 15 , wherein leveraging the pulse response measurement capability in the digital SERDES further comprises:

deriving a pulse response from the data through a training sequence; and

determining which data patterns result in outer extremes of a zero crossing through a pulse response eye diagram analysis script using the pulse response.

17. The method of implementing a low jitter and high bandwidth CDR apparatus of claim 1 wherein the criteria is one selected from a group consisting of a proximity to a zero crossing of each particular sample, a stored hysteresis sampling containing at least one sample of an input signal, information specific to previously known votes that are historically inaccurate due to channel noise, and proximity to zero crossings according to an eye diagram mapping of the votes.

18. The non-transitory computer readable medium of claim 9 , wherein the criteria is one selected from a group consisting of a proximity to a zero crossing of each particular sample, a stored hysteresis sampling containing at least one sample of an input signal, information specific to previously known votes that are historically inaccurate due to channel noise, and proximity to zero crossings according to an eye diagram mapping of the votes.

Assignments (2)
MERGER AND CHANGE OF NAME Recorded Dec 16, 2015
From: ORACLE USA, INC.; SUN MICROSYSTEMS, INC.; ORACLE AMERICA, INC.
To: ORACLE AMERICA, INC.
Reel/Frame 037311/0182 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 31, 2012
From: DOBLAR, DREW G.; HUANG, DAWEI; RISK, GABRIEL C.
To: SUN MICROSYSTEMS, INC.
Reel/Frame 028296/0256 →
Continuity (1)
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