Integrated mask-programmable logic devices with multiple metal levels and manufacturing process thereof

1. An integrated mask-programmable device, comprising:

a plurality of metal levels including a top metal level, a bottom metal level and a first intermediate metal level formed between said top and bottom metal levels;

a plurality of via levels arranged between the bottom and the first intermediate metal levels and between the first intermediate and the top metal levels and connecting each metal level to adjacent metal levels;

said plurality of metal levels forming a first, a second and at least a third terminal, wherein an intermediate metal region of said first intermediate metal level forms the third terminal, and

said top and bottom metal levels comprising at least two metal regions, and said first intermediate metal level comprising at least three metal regions.

2. The integrated mask-programmable device according to claim 1 , wherein said metal regions of said top metal level form the first and the second terminals.

3. The integrated mask-programmable device according to claim 1 , wherein said metal regions of said top, first intermediate and bottom metal levels form a plurality of stacks, at least two of said stacks including a metal region of said top metal level, each stack including a metal region of said first intermediate metal level and a metal region of said bottom metal level, the metal regions of each stack being at least partially vertically aligned; in each stack, the metal regions of the first intermediate metal level being connected to the metal regions of the top metal level and/or the bottom metal level by at least one respective via connection.

4. The integrated mask-programmable device according to claim 3 , wherein the via connections of a first stack are aligned along two parallel vertical axes, with each via connection being offset with respect to a preceding and/or a subsequent via connection of the first stack.

5. The integrated mask-programmable device according to claim 3 , wherein the via connections of a second and a third stacks are aligned along respective vertical axes.

6. The integrated mask-programmable device according to claim 3 , comprising a plurality of further intermediate metal levels arranged between the bottom metal level and the first intermediate metal level and connected to said bottom and/or first intermediate metal levels by respective further via connections; each via connection of a first stack being offset with respect to a preceding and/or a subsequent via connection, via connections of odd via levels being aligned to each other and via connections of even via levels being aligned to each other.

7. The integrated mask-programmable device according to claim 6 , wherein two stacks of said plurality of stacks share at least one metal region belonging to one of said top, bottom, first and further intermediate metal levels.

8. The integrated mask-programmable device according to claim 1 , wherein said metal regions are shaped as polygons.

9. The integrated mask-programmable device according to claim 8 , wherein said polygons include at least one shape among rectangle, E-shape, L-shape, comb-shape, T-shape.

10. The integrated mask-programmable device according to claim 1 , comprising a fourth terminal, the fourth terminal comprising a metal region vertically overlying metal regions of said first intermediate metal level and said bottom metal level.

11. The integrated mask-programmable device according to claim 10 , forming a multi-state switch, having one input and a plurality of outputs.

12. The integrated mask-programmable device according to claim 10 , forming a multi-state switch, having a plurality of inputs and an output.

13. The integrated mask-programmable device according to claim 10 , forming a multi-state switch, wherein the top metal level and bottom metal level comprise each a number P of metal regions and the first intermediate metal level comprises a number P+1 of metal regions.

14. A chip including a chip version register formed by a plurality of the integrated mask-programmable device according to claim 1 .

15. A method for forming an integrated mask-programmable device, comprising the steps of:

forming a plurality of metal levels including a top metal level, a bottom metal level and a first intermediate metal level formed between said top and bottom metal levels;

forming a plurality of via levels arranged between the bottom and the first intermediate metal levels and between the first intermediate and the top metal levels and connecting each metal level to adjacent metal levels, said plurality of metal levels defining a first, a second and at least a third terminal, wherein an intermediate metal region of said first intermediate metal level forms the third terminal;

said top and bottom metal levels comprising at least two metal regions, and said first intermediate metal level comprising at least three metal regions;

connecting said first terminal to said third terminal or said second terminal to said third terminal by modifying a single metal or via level.

16. An integrated mask-programmable device, comprising:

a plurality of metal levels including a top metal level, a first intermediate metal level, and a second intermediate metal level formed between said top and bottom metal levels;

a plurality of via levels arranged between the bottom and the top metal levels and connecting each metal level to adjacent metal levels;

said plurality of metal levels forming a first, a second and at least a third terminal, and

said top and bottom metal levels comprising at least two metal regions, and said first and second intermediate metal levels comprising at least three metal regions.

17. The integrated mask-programmable device according to claim 16 , wherein said metal regions of said top metal level form the first and the second terminals and an intermediate metal region of said first intermediate metal level forms the third terminal.

18. The integrated mask-programmable device according to claim 16 , wherein said metal regions of said top, first intermediate, second intermediate and bottom metal levels form a plurality of stacks, at least two of said stacks including a metal region of said top metal level, each stack including a metal region of said first intermediate metal level, a metal region of said first intermediate metal level and a metal region of said bottom metal level, the metal regions of each stack being at least partially vertically aligned; in each stack, the metal regions of the first intermediate metal level being connected to the metal regions of the top metal level and/or the bottom metal level by at least one respective via connection.

19. The integrated mask-programmable device according to claim 16 , wherein said metal regions are shaped as polygons.

20. The integrated mask-programmable device according to claim 19 , wherein said polygons include at least one shape among rectangle, E-shape, L-shape, comb-shape, T-shape.

21. The integrated mask-programmable device according to claim 16 , comprising a fourth terminal, the fourth terminal comprising a metal region vertically overlying metal regions of said first intermediate metal level and said bottom metal level.

22. The integrated mask-programmable device according to claim 16 , forming a multi-state switch, having a plurality of inputs and an output.

23. The integrated mask-programmable device according to claim 16 , forming a multi-state switch, wherein the top metal level and bottom metal level comprise each a number P of metal regions and the first and second intermediate metal levels comprises a number P+1 of metal regions.

24. A method for forming an integrated mask-programmable device, comprising the steps of:

forming a plurality of metal levels including a top metal level, a bottom metal level, a first intermediate metal level and a second intermediate metal level formed between said top and bottom metal levels;

forming a plurality of via levels arranged between the bottom and the top metal levels and connecting each metal level to adjacent metal levels, said plurality of metal levels defining a first, a second and at least a third terminal;

said top and bottom metal levels comprising at least two metal regions, and said first intermediate metal level comprising at least three metal regions;

connecting said first terminal to said third terminal or said second terminal to said third terminal by modifying a single metal or via level.