A/D conversion circuit and electronic instrument
View Patent ↗An A/D conversion circuit includes a continuous-time filter that performs a filtering process on an input signal, an SCF that is provided in a subsequent stage of the continuous-time filter and performs a filtering process utilizing the continuous-time filter as a prefilter, a cut-off frequency of the SCF being variably set corresponding to a frequency band of the input signal, an A/D converter that is provided in a subsequent stage of the SCF and performs an A/D conversion operation utilizing the continuous-time filter and the SCF as prefilters, and a digital filter that is provided in a subsequent stage of the A/D converter and performs a digital filtering process utilizing the continuous-time filter and the SCF as prefilters, a cut-off frequency of the digital filter being variably set corresponding to the frequency band of the input signal.
1. An A/D conversion circuit comprising:
a continuous-time filter that performs a filtering process on an input signal;
a switched-capacitor filter that is provided in a subsequent stage of the continuous-time filter and performs a filtering process utilizing the continuous-time filter as a prefilter, a cut-off frequency of the switched-capacitor filter being variably set corresponding to a frequency band of the input signal;
an A/D converter that is provided in a subsequent stage of the switched-capacitor filter and performs an A/D conversion operation utilizing the continuous-time filter and the switched-capacitor filter as prefilters; and
a digital filter that is provided in a subsequent stage of the A/D converter and performs a digital filtering process utilizing the continuous-time filter and the switched-capacitor filter as prefilters, a cut-off frequency of the digital filter being variably set corresponding to the frequency band of the input signal.
2. The A/D conversion circuit as defined in claim 1 , further comprising:
a control circuit that variably sets the cut-off frequency of the switched-capacitor filter and the cut-off frequency of the digital filter.
3. The A/D conversion circuit as defined in claim 1 ,
when a cut-off frequency of the continuous-time filter is referred to as fc 0 , the cut-off frequency of the switched-capacitor filter is referred to as fc 1 , and the cut-off frequency of the digital filter is referred to as fc 2 , the relationship fc 0 >fc 1 >fc 2 being satisfied.
4. The A/D conversion circuit as defined in claim 1 ,
when a sampling frequency of the switched-capacitor filter is referred to as fck 1 , the cut-off frequency of the switched-capacitor filter is referred to as fc 1 , a resolution of the A/D converter is n bits, and an attenuation factor of the continuous-time filter at a frequency fck 1 -fc 1 is AT 1 dB, the relationship AT 1 ≦20×log(½ n ) being satisfied.
5. The A/D conversion circuit as defined in claim 4 ,
when a sampling frequency of the digital filter is referred to as fck 2 , the cut-off frequency of the digital filter is referred to as fc 2 , and a resultant attenuation factor of the continuous-time filter and the switched-capacitor filter at a frequency fck 2 -fc 2 is AT 2 dB, the relationship AT 2 ≦20×log(½ n ) being satisfied.
6. The A/D conversion circuit as defined in claim 1 ,
a cut-off frequency fc 0 of the continuous-time filter being fixed; and
the cut-off frequency fc 1 of the switched-capacitor filter and the cut-off frequency fc 2 of the digital filter being variably set.
7. The A/D conversion circuit as defined in claim 1
a sampling frequency fck 1 of the switched-capacitor filter being fixed; and the cut-off frequency fc 1 of the switched-capacitor filter being variably set.
8. The A/D conversion circuit as defined in claim 7 ,
the cut-off frequency fc 1 of the switched-capacitor filter being variably set by changing a capacitance ratio of a plurality of capacitors included in the switched-capacitor filter.
9. The A/D conversion circuit as defined in claim 1 ,
a sampling frequency fck 2 and the cut-off frequency fc 2 of the digital filter being variably set.
10. The A/D conversion circuit as defined in claim 9 ,
the sampling frequency fck 2 of the digital filter being set so that the sampling frequency fck 2 decreases as the cut-off frequency fc 1 of the switched-capacitor filter decreases.
11. The A/D conversion circuit as defined in claim 10 ,
the cut-off frequency fc 2 of the digital filter being set so that the cut-off frequency fc 2 decreases as the frequency band of the input signal decreases.
12. The A/D conversion circuit as defined in claim 1 ,
when a sampling frequency of the A/D converter is referred to as fck 1 ′, a sampling frequency fck 2 of the digital filter being variably set in such a range that the relationship fck 1 ′≧fck 2 is satisfied.
13. The A/D conversion circuit as defined in claim 12 ,
the A/D converter intermittently performing the A/D conversion operation every (fck 1 ′/fck 2 ) timings when fck 1 ′>fck 2 , and outputting digital data obtained by the intermittent A/D conversion operations to the digital filter.
14. The A/D conversion circuit as defined in claim 1 , further comprising:
an amplifier circuit that includes a plurality of amplifiers that are cascaded, the amplifier circuit being provided in a preceding stage of the switched-capacitor filter and receiving the input signal,
the continuous-time filter being formed by the plurality of amplifiers of the amplifier circuit.
15. An electronic instrument comprising the A/D conversion circuit as defined in claim 1 .