Capacitor and method of manufacturing the same

1. An apparatus comprising:

a substrate;

a diffusion junction region formed over the substrate;

a high concentration diffusion junction region formed in a portion of the diffusion junction region;

an oxide layer formed over the substrate, the oxide layer having an opening that exposes a portion of the high concentration diffusion junction region;

a first polysilicon plate formed over a portion of the oxide layer and spaced from the opening;

a nitride layer formed over a portion of the first polysilicon plate;

a sidewall formed over a side of the first polysilicon layer, over a side of the nitride layer, and over a portion of the oxide layer between the side of the polysilicon layer and the opening; and

a second polysilicon plate formed over the nitride layer, over the sidewall, and over the high concentration diffusion junction region,

wherein the nitride layer is disposed over a portion of the first polysilicon plate adjacent the sidewall, and exposes a portion of the first polysilicon plate opposite the sidewall.

2. The apparatus of claim 1 , including:

an interlayer dielectric formed over the exposed first polysilicon plate, the second polysilicon plate, and oxide layer; and

a first contact plug contacting the exposed portion of the first polysilicon plate through the interlayer dielectric; and

a second contact plug contacting the second polysilicon plate through the interlayer dielectric.

3. The apparatus of claim 1 , wherein:

a first trench, a second trench, and a third trench are formed in the substrate;

a fourth trench is formed in an oxide layer between the first trench and the second trench;

a fifth trench is formed in an oxide layer between the second trench and the third trench; and

the opening is disposed in the fifth trench.

4. The apparatus of claim 3 , wherein the first trench, the second trench, and the third trench have a structure opposite to that of the fourth trench and the fifth trench.

5. The apparatus of claim 3 , wherein a thick oxide layer over the first trench, the second trench, and the third trench serves a field oxide layer, and a thin oxide layer below the fourth trench and the fifth trench serves as an interlayer dielectric.

6. The apparatus of claim 3 , wherein the first polysilicon plate is formed over the first trench, a portion of the second trench, and the fourth trench, and spaced away from the fifth trench.

7. The apparatus of claim 3 , wherein the nitride layer is disposed over at least the second trench and the fourth trench, and spaced away from the fifth trench.

8. The apparatus of claim 3 , wherein the first polysilicon plate, the nitride layer, and the second polysilicon plate are disposed over at least the second trench.

9. The apparatus of claim 1 , wherein:

the diffusion junction region serves as a lower conductive plate of a metal-oxide-semiconductor capacitor;

the first polysilicon plate serves as a lower conductive plate of a polysilicon-insulator-polysilicon capacitor and an upper conductive plate of a metal-oxide-semiconductor capacitor;

the nitride layer serves as a dielectric layer of the polysilicon-insulator-polysilicon capacitor;

the high concentration diffusion junction region serves as a contact terminal of the lower conductive plate of the metal-oxide-semiconductor capacitor; and

the second polysilicon plate serves as a contact terminal of the lower conductive plate of the metal-oxide-semiconductor capacitor and as an upper conductive plate of the polysilicon-insulator-polysilicon capacitor.