IP Library Granted Patent US 9,091,736
Granted Patent B2
US 9,091,736 · App. 12/349,039 · Granted Jul 28, 2015

Systems and methods of battery cell anomaly detection

Inventors: Karthik Kadirvel (Gainesville, FL); Umar Jameer Lyles (Palm Bay, FL); John H. Carpenter, Jr. (Palm Bay, FL)
Assignee: TEXAS INSTRUMENTS INCORPORATED
G01R31/3658H02J7/0021
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 9,091,736
App. No.
12/349,039
Granted
Jul 28, 2015
Kind
B2
Abstract

Systems and methods for cell anomaly detection are provided. The disclosed systems and methods of cell anomaly detection may use a single circuit to detect both cell-open and imbalance conditions. Disclosed embodiments may incorporate a continuous or a sampled time system (i.e. cell anomaly detection is performed when an enable signal is active). An example embodiment includes receiving voltages of a plurality of cells of a battery pack; converting the received voltages to currents; determining a maximum current of the currents; determining whether at least one of the currents is anomalous; and reporting the at least one anomalous current as indicative of a bad cell.

Claims (42)

1. A system comprising:

a plurality of voltage to current (V-to-I) converters each being couplable to one of a respective plurality of cells;

a cell detector circuit coupled to each of the plurality of V-to-I converters to receive a current generated by its respective V-to-I converter, wherein the cell detector circuit compares each of the respective plurality of cells with other cells in the plurality of cells by determining a maximum current input to the converters and which cell provides that maximum current to determine if any of the plurality of V-to-I converters provides an anomalous input current and determines which of the plurality of V-to-I converters provides the anomalous input current whereby relative performance between the cells is determined, wherein the cell detector circuit further comprises a plurality of multi-input current detectors, wherein each of the plurality of multi-input current detectors is coupled to each of the plurality of V-to-I converters, and wherein each multi-input current detector compares at least one of the V-to-I converter outputs to a threshold value to determine an anomalous current; and wherein each multi-input detector outputs a logic signal for each of the inputs, each output of the multi-input current detector is coupled to the input of an OR gate.

2. The system of claim 1 , wherein at least one of the V-to-I converters comprises a plurality of field effect transistors, bipolar transistors, CMOS transistors, or current mirror devices.

3. The system of claim 1 , wherein for each multi-input current detector, one input of each V-to-I converter is amplified.

4. The system of claim 1 , wherein for each multi-input current detector, one input of each V-to-I converter is not amplified.

5. The system of claim 1 , wherein the cell detector circuit is ground referenced.

6. A battery pack comprising:

a plurality of cells;

a plurality of high-value resistor dividers, each high-value resistor divider coupled across one cell of the plurality of cells;

a plurality of multi-input current detectors, each multi-input current detector coupled to at least one of a plurality of dividers for one cell of the plurality of cells, the multi-input current detector determining the maximum current input to the detectors and which cell provides maximum current and including a current comparator which compares each of the plurality of cells with other cells in the plurality of cells,

wherein each of the plurality of multi-input current detectors is coupled to each of the plurality of V-to-I converters, and wherein each multi-input current detector compares at least one of the V-to-I converter outputs to a threshold value to determine an anomalous current; and wherein each multi-input detector outputs a logic signal for each of the inputs, each logic signal being coupled to the input of an OR gate for

determining which cell of the plurality of cells is in a fault condition.

7. The battery pack of claim 6 , wherein the battery pack further comprises a plurality of voltage to current (V-to-I) converters, wherein each of the plurality of V-to-I converters converts the voltage to a representative current.

8. The battery pack of claim 7 , wherein at least one of the V-to-I converters comprises a plurality of field effect transistors, bipolar transistors, CMOS transistors, or current mirror devices.

9. The battery pack of claim 6 , wherein for each multi-input current detector one input of each V-to-I converter is amplified.

10. The battery pack of claim 6 , wherein for each multi-input current detector, one input of each V-to-I converter is not amplified.

11. The battery pack of claim 6 , wherein the fault condition indicates an input resistance greater than a predetermined input resistance.

12. The battery pack of claim 6 , wherein at least one of the plurality of multi-input current detectors is ground referenced.

13. A method comprising:

receiving voltages across the cells of a plurality of cells of a battery pack;

converting the received voltages to currents;

data processing the currents to compare each of the plurality of cells with other cells in the plurality of cells by

amplifying one of the currents;

comparing each of the currents to a predetermined reference current;

producing a logic level signal for each current based on the comparing; and

inverting the logic level signal for the current that was amplified;

determining a maximum current input to the converters and which cell provides that maximum current to determine whether at least one of the currents is anomalous; and

reporting the at least one anomalous current as indicative meeting a failure criterion.

14. The method of claim 13 , wherein the method further comprises the step of determining if any of the inverted logic level signals indicate an anomalous cell voltage.

15. The method of claim 13 , wherein the step of data processing the currents is performed using a ground referenced circuit.

16. A method comprising:

receiving voltages across the cells of a plurality of cells of a battery pack;

converting the received voltages to currents;

data processing the currents to compare each of the plurality of cells with other cells in the plurality of cells;

determining a maximum current input to the converters and which cell provides that maximum current to determine whether at least one of the currents is anomalous; and

reporting the at least one anomalous current as indicative meeting a failure criterion, wherein the step of data processing the currents further comprises:

amplifying all but one of the currents;

comparing each of the currents to a predetermined reference current;

producing a logic level signal for each current based on the comparing; and

inverting the logic level signal for the current that was not amplified.

17. The method of claim 16 , wherein the method further comprises the step of determining if any of the inverted logic level signals indicate an anomalous cell voltage.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 6, 2009
From: KADIRVEL, KARTHIK; LYLES, UMAR JAMEER; CARPENTER, JOHN H., JR.
To: TEXAS INSTRUMENTS INCORPORATED
Reel/Frame 022096/0136 →
Continuity (1)
Related Publication 20100173183A1 · Jul 8, 2010