Leadless package
View Patent ↗Provided is a semiconductor package, and in particular a semiconductor package which is capable of electrically connecting to the outside without a lead. The leadless package includes a plurality of lower conducting layer patterns disposed separately from one another; an insulating layer pattern on the lower conducting layer patterns; a plurality of upper conducting layer patterns disposed separately from one another, on the insulating layer pattern; at least one semiconductor chip disposed on the upper conducting layer patterns; hole patterns formed through the upper conducting layer patterns and the insulating layer pattern, so that a part of the top surface of the lower conducting layer patterns are exposed; and electrical connectors electrically connecting: the at least one semiconductor chip and the upper conducting layer patterns; the upper conducting layer patterns and the lower conducting layer patterns exposed by the hole patterns; and the at least one semiconductor chip and the lower conducting layer patterns exposed by the hole patterns.
1. A leadless package comprising:
a plurality of lower conducting layer patterns disposed separately from one another;
an insulating layer pattern on the plurality of lower conducting layer patterns;
a plurality of upper conducting layer patterns disposed separately from one another, wherein the plurality of upper conducting layer patterns is on the insulating layer pattern;
at least one semiconductor chip disposed on the plurality of upper conducting layer patterns;
a hole pattern formed in the plurality of upper conducting layer patterns and in the insulating layer pattern, so that a part of the top surface of the plurality of lower conducting layer patterns is exposed;
a first electrical connector electrically connecting the at least one semiconductor chip and the plurality of upper conducting layer patterns;
a second electrical connector electrically connecting the plurality of upper conducting layer patterns and the part of the top surface of the lower conducting layer patterns exposed by the hole pattern; and
a third electrical connector electrically connecting the part of the top surface of the lower conducting layer patterns exposed by the hole pattern with the at least one semiconductor chip,
wherein the first, second, and third electrical connectors comprise bonding wires.
2. The leadless package of claim 1 , further comprising a sealant material sealing the insulating layer pattern, the at least one semiconductor chip, the first, second, and third electrical connectors, the hole pattern, the plurality of upper conducting layer patterns, and the plurality of lower conducting layer patterns, so that the bottom surfaces of the plurality of lower conducting layer patterns are exposed to the outside.
3. The leadless package of claim 1 , wherein the plurality of upper conducting layer patterns are formed of a conductive material comprising at least one of a metal or an alloy.
4. The leadless package of claim 3 , wherein the conductive material comprises copper.
5. The leadless package of claim 1 , wherein the lower conducting layer patterns are formed of a conductive material comprising a metal or an alloy.
6. The leadless package of claim 5 , wherein the conductive material comprises aluminum.
7. The leadless package of claim 1 , wherein the bonding wires are formed of at least one of aluminum, copper, or gold.
8. A leadless package comprising:
a plurality of lower conducting layer patterns disposed separately from one another;
an insulating layer pattern on the plurality of lower conducting layer patterns;
a plurality of upper conducting layer patterns disposed separately from one another, wherein the plurality of upper conducting layer patterns is on the insulating layer pattern;
at least one semiconductor chip disposed on the plurality of upper conducting layer patterns;
a hole pattern formed in the plurality of upper conducting layer patterns and in the insulating layer pattern, so that a part of the top surface of the plurality of lower conducting layer patterns is exposed;
a first electrical connector electrically connecting the at least one semiconductor chip and the plurality of upper conducting layer patterns;
a second electrical connector electrically connecting the plurality of upper conducting layer patterns and the part of the top surface of the lower conducting layer patterns exposed by the hole pattern; and
a third electrical connector electrically connecting the part of the top surface of the lower conducting layer patterns exposed by the hole pattern with the at least one semiconductor chip,
wherein the first, second, and third electrical connectors comprise ribbon wires or metal clips.
9. The leadless package of claim 1 , wherein the at least one semiconductor chip comprises at least one of an insulating gate bipolar transistor or a diode.
10. The leadless package of claim 2 , wherein the sealant material is formed of epoxy molding compound.
11. A leadless package comprising: an insulating layer pattern having a hole pattern; a plurality of upper conducting patterns disposed separately from one another, wherein the plurality of upper conducting layer patterns is on the insulating layer pattern; a plurality of semiconductor chips disposed on a top surface of the plurality of upper conducting layer patterns; a plurality of lower conducting layer patterns disposed separately from one another, on the bottom surface of the insulating layer pattern, wherein a part of the top surface of one or more of the plurality of lower conducting layer patterns is exposed by the hole pattern; and at least one bonding wire directly connecting the top surface of the lower conducting layer patterns exposed by the hole pattern and at least one semiconductor chip in the plurality of semiconductor chips.
12. The leadless package of claim 11 , further comprising a sealant material sealing the insulating layer pattern, the at least one semiconductor chip, the at least one electrical connector, and the plurality of lower conducting layer patterns, so that the bottom surfaces of the plurality of lower conducting layer patterns are exposed to the outside.
13. The leadless package of claim 11 , wherein the plurality of lower conducting layer patterns are formed of a conductive material comprising at least one of a metal or an alloy.
14. The leadless package of claim 13 , wherein the conductive material comprises one of copper or aluminum.
15. The leadless package of claim 11 , wherein the at least one semiconductor chip comprises at least one of an insulating gate bipolar transistor or a diode.
16. The leadless package of claim 11 , wherein the at least one bonding wire is formed of at least one of aluminum, copper, or gold.
17. A leadless package comprising:
an insulating layer pattern having a hole pattern;
a plurality of upper conducting patterns disposed separately from one another, wherein the plurality of upper conducting layer patterns is on the insulating layer pattern;
a plurality of semiconductor chips disposed on a top surface of the plurality of upper conducting layer patterns;
a plurality of lower conducting layer patterns disposed separately from one another, on the bottom surface of the insulating layer pattern, wherein a part of the top surface of one or more of the plurality of lower conducting layer patterns is exposed by the hole pattern; and
at least one ribbon wire or metal clip directly connecting the top surface of the lower conducting layer patterns exposed by the hole pattern and at least one semiconductor chip in the plurality of semiconductor chips.
18. The leadless package of claim 12 , wherein the sealant material is formed of epoxy molding compound.