IP Library Granted Patent US 7,956,947
Granted Patent B2
US 7,956,947 · App. 12/355,646 · Granted Jun 7, 2011

Thin film transistor array substrate having improved electrical characteristics and method of manufacturing the same

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Quick Facts
Patent No.
US 7,956,947
App. No.
12/355,646
Granted
Jun 7, 2011
Kind
B2
Abstract

A thin film transistor array substrate, which can have high mobility of charge and can achieve uniform electrical characteristics for wide display devices, and a method of manufacturing the thin film transistor array substrate, are provided. The thin film transistor array substrate includes an oxide semiconductor layer having a channel and formed on an insulating substrate, a gate electrode overlapping the oxide semiconductor layer, a gate insulating film disposed between the oxide semiconductor layer and the gate electrode, and a passivation film formed on the oxide semiconductor layer and the gate electrode. At least one of the gate insulating film and the passivation film contains fluorine-containing silicon.

Claims (37)

1. A thin film transistor array substrate comprising:

an oxide semiconductor layer;

a gate electrode overlapping the oxide semiconductor layer;

a gate insulating film disposed between the oxide semiconductor layer and the gate electrode; and

a passivation film formed on the oxide semiconductor layer and the gate electrode;

wherein at least one of the gate insulating film and the passivation film contains fluorine-containing silicon.

2. The thin film transistor array substrate of claim 1 , wherein the fluorine-containing silicon is fluorine-containing silicon nitride, fluorine-containing silicon oxide, or fluorine-containing silicon oxynitride.

3. The thin film transistor array substrate of claim 2 , wherein the fluorine-containing silicon is SiOF, SiNF, SiONF, or SiOCF.

4. The thin film transistor array substrate of claim 1 , wherein the passivation film includes:

a first passivation film formed of fluorine-containing silicon and

a second passivation film.

5. The thin film transistor array substrate of claim of claim 4 , wherein the thickness of the first passivation film is 3 nm or more.

6. The thin film transistor array substrate of claim 1 , wherein the gate insulating film includes:

a first insulating film formed of fluorine-containing silicon and

a second insulating film.

7. The thin film transistor array substrate of claim 6 , wherein the thickness of the first insulating film is 3 nm or more.

8. The thin film transistor array substrate of claim 1 , wherein the oxide semiconductor layer is an oxide of a material selected from Zn, In, Ga, Sn, and their combination.

9. The thin film transistor array substrate of claim 1 , further comprising a source electrode and a drain electrode formed on the oxide semiconductor layer, wherein and the source electrode and the drain electrode have an upper TiN film and a lower Cu film.

10. A method of manufacturing a thin film transistor array substrate, comprising:

forming a thin film transistor structure having an oxide semiconductor layer, a gate electrode overlapping the oxide semiconductor layer, and a gate insulating film therebetween; and

forming a passivation film on the oxide semiconductor layer and the gate electrode;

wherein at least one of the gate insulating film and the passivation film contains fluorine-containing silicon.

11. The method of claim 10 , wherein the forming the at least one of the gate insulating film and a passivation film comprises forming the fluorine-containing silicon by reaction gases without hydrogen.

12. The method of claim 11 , wherein the forming the fluorine-containing silicon further comprises forming the fluorine-containing silicon by reacting a first reaction gas containing Si and F with a second reaction gas containing O, N, or F.

13. The method of claim 12 , wherein the first reacting gas is at least one of SiF, SiF 2 , SiF 3 , and SiF 4 and the second reaction gas is at least one of NO, N 2 O, O 2 , NF, NF 2 , and NF 3 .

14. The method of claim 10 , wherein the forming the fluorine-containing silicon further comprises forming the fluorine-containing silicon by reacting a first reaction gas containing fluorine with a second reaction gas containing hydrogen.

15. The method of claim 14 , wherein the first reaction gas is at least one of SiF, SiF 2 , SiF 3 , and SiF 4 and the second reaction gas is at least one of NH 2 and NH 3 .

16. The method of claim 14 , wherein the first reaction gas is at least one of NF, NF 2 , and NF 3 and the second reaction gas includes SiH 4 .

17. The method of claim 10 , wherein the fluorine-containing silicon is fluorine-containing silicon nitride, fluorine-containing silicon oxide, or fluorine-containing silicon oxynitride.

18. The method of claim 17 , wherein the fluorine-containing silicon is SiOF, SiNF, SiONF, or SiOCF.

19. The method of claim 10 , wherein the oxide semiconductor layer is an oxide of a material that is at least one of Zn, In, Ga, and Sn.

20. A thin film transistor array substrate comprising:

an oxide semiconductor layer;

a gate electrode overlapping the oxide semiconductor layer;

a gate insulating film disposed between the oxide semiconductor layer and the gate electrode; and

a passivation film formed on the oxide semiconductor layer and the gate electrode;

wherein the gate insulating film and the passivation film contains fluorine-containing silicon.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 22, 2012
From: SAMSUNG ELECTRONICS CO., LTD.
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 029008/0339 →