Shelding mesh design for an integrated circuit device
View Patent ↗Methods and apparatuses to design an Integrated Circuit (IC) with a shielding of wires. In at least one embodiment, a shielding mesh of at least two reference voltages (e.g., power and ground) is used to reduce both the capacitive coupling and the inductive coupling in routed signal wires in IC chips. In some embodiments, a type of shielding mesh (e.g., a shielding mesh with a window surrounded by a power ring, or a window with a parser set of shielding wires) is selected to make more routing area available in locally congested areas. In other embodiments, the shielding mesh is used to create or add bypass capacitance. Other embodiments are also disclosed.
1. A method of designing an integrated circuit, the method comprising:
introducing at least one shielding mesh into a representation of a design of the IC; routing representations of signal lines in the shielding mesh prior to an optimization which determines whether signal lines should be shielded, and
optimizing the design of the IC after the routing, wherein the optimizing comprises removing at least one shielding wire from the shielding mesh, and wherein the removing of the at least one shielding wire allows a signal line, which was adjacent to the at least one shielding wire, to transmit signals faster after the at least one shielding wire is removed, wherein at least one of the introducing and the optimizing is performed using a processor.
2. The method of claim 1 wherein the shielding mesh comprises a first plurality of conductive lines for carrying a first reference voltage and a second plurality of conductive lines for carrying a second reference voltage.
3. The method of claim 1 , further comprising:
determining whether or not a need exists to speed up a first signal line in the shielding mesh.
4. The method of claim 1 , further comprising:
determining whether or not a first shielding wire of the shielding mesh can be removed.
5. The method of claim 1 , further comprising:
searching for neighboring signals within the shielding mesh having different transition times.
6. The method of claim 1 , further comprising:
moving at least one of the signal lines out of the shielding mesh.
7. A non-transitory machine readable medium containing executable computer program instructions which when executed by a data processing system cause the data processing system to perform a method of designing an integrated circuit, the method comprising:
introducing at least one shielding mesh into a representation of a design of the IC; routing representations of signal lines in the shielding mesh prior to an optimization which determines whether signal lines should be shielded; and optimizing the design of the IC after the routing wherein the optimizing comprises removing at least one shielding wire from the shielding mesh, and wherein the removing of the at least one shielding wire allows a signal line, which was adjacent to the at least one shielding wire, to transmit signals faster after the at least one shielding wire is removed.
8. The medium of claim 7 wherein the shielding mesh comprises a first plurality of conductive lines for carrying a first reference voltage and a second plurality of conductive lines for carrying a second reference voltage.
9. The medium of claim 7 , further comprising instructions that when executed, case the data processing system to perform operations comprising
determining whether or not a need exists to speed up a first signal line in the shielding mesh.
10. The medium of claim 7 , further comprising instructions that when executed, case the data processing system to perform operations comprising
determining whether or not a first shielding wire of the shielding mesh can be removed.
11. The medium of claim 7 , further comprising instructions that when executed, case the data processing system to perform operations comprising
searching for neighboring signals within the shielding mesh having different transition times.
12. The medium of claim 7 , further comprising instructions that when executed, case the data processing system to perform operations comprising
moving at least one of the signal lines out of the shielding mesh.
13. An integrated circuit comprising:
means for introducing at least one shielding mesh into a representation of a design of the IC;
means for routing representations of signal lines in the shielding mesh prior to an optimization which determines whether signal lines should be shielded; and
means for optimizing the design of the IC after the routing, wherein the optimizing comprises removing at least one shielding wire from the shielding mesh, and wherein the removing of the at least one shielding wire allows a signal line, which was adjacent to the at least one shielding wire, to transmit signals faster after the at least one shielding wire is removed, wherein at least one of the means for introducing, routing, and optimizing includes a processor.
14. The integrated circuit of claim 13 , further comprising:
means for moving at least one of the signal lines out of the shielding mesh.