IP Library Granted Patent US 7,880,262
Granted Patent B2
US 7,880,262 · App. 12/360,357 · Granted Feb 1, 2011

Semiconductor device

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Quick Facts
Patent No.
US 7,880,262
App. No.
12/360,357
Granted
Feb 1, 2011
Kind
B2
Abstract

An active barrier structure has a p-type region and an n-type region, each of which is in contact with a p-type impurity region and which are ohmic-connected to each other to attain a floating potential. A trench isolation structure is formed between an active barrier region and the other region (an output transistor formation region and a control circuit formation region). The trench isolation structure has a trench extending from the main surface of the semiconductor substrate through the n − epitaxial layer to reach the p-type impurity region. Therefore, a semiconductor device is obtained which allows the chip size to be reduced easily and is highly effective in preventing movement of electrons from the output transistor formation region to the other element formation region.

Claims (9)

1. A semiconductor device having an output element formation region, an other element formation region, and an active barrier region arranged between said output element formation region and said other element formation region, comprising:

a semiconductor substrate having a main surface,

a first region of a first conductivity type formed in said semiconductor substrate in said output element formation region, said other element formation region, and said active barrier region;

a second region of a second conductivity type formed in said semiconductor substrate in said output element formation region, said other element formation region, and said active barrier region so as to form a pn junction with said first region and to be positioned on the main surface side of said semiconductor substrate rather than said first region;

an active barrier structure having a third region of the first conductivity type and a fourth region of the second conductivity type, each of which is in contact with said first region and which are ohmic-connected to each other to attain a floating potential, in said active barrier region; and

a trench isolation structure having a trench formed at least one of between said active barrier region and said output element formation region and between said active barrier region and said other element formation region and formed to extend from the main surface of said semiconductor substrate through said second region and then reach said first region.

2. The semiconductor device according to claim 1 , wherein said trench extends to a position deeper than said third region and said fourth region relative to the main surface of said semiconductor substrate.

3. The semiconductor device according to claim 1 , said semiconductor substrate includes another trench formed between said third region and said fourth region and formed to extend from the main surface of said semiconductor substrate through said second region and then reach said first region.

4. The semiconductor device according to claim 1 , further comprising a fifth region of the first conductivity type formed at a lower part of said trench and having an impurity concentration higher than that of said first region.

Assignments (3)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
CHANGE OF NAME Recorded Sep 10, 2010
From: RENESAS TECHNOLOGY CORP.
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 024973/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 27, 2009
From: YAMAMOTO, FUMITOSHI
To: RENESAS TECHNOLOGY CORP.
Reel/Frame 022161/0108 →