Granted Patent B2

US 8,688,910 · App. 12/366,985 · Granted Apr 1, 2014

Abstract

Claims (40)

1. A data processing system comprising:

a cache;

snoop circuitry having a snoop request queue which stores non-debug snoop requests and debug snoop requests, wherein the snoop circuitry receives the non-debug snoop requests in response to transactions snooped from a system interconnect and receives the debug snoop requests in response to debug snoop commands from a debugger, and wherein the snoop circuitry provides the non-debug snoop requests and the debug snoop requests from the snoop request queue to the cache, wherein the snoop request queue includes a plurality of entries, each entry for storing a request, wherein each request can either be a non-debug snoop request or a debug snoop request, and wherein the snoop circuitry includes, for each request stored the snoop request queue, a debug indicator which indicates whether the request is a non-debug snoop request or a debug snoop request; and

debug control circuitry which provides the debug snoop requests in response to the debug snoop commands to the snoop circuitry for storage into the snoop request queue.

2. The data processing system of claim 1 , wherein the debug snoop requests are provided to the snoop request queue in response to the debug snoop commands without use of the system interconnect.

3. The data processing system of claim 1 , wherein the debug snoop requests are provided to the snoop request queue in response to the debug snoop commands without placing the data processing system in a halted mode.

4. The data processing system of claim 1 , wherein the snoop circuitry, in response to a processed request formed by the cache processing a request from the snoop request queue, uses the debug indicator corresponding to the processed request to route a snoop response corresponding to the processed request to either the debug control circuitry or the system interconnect.

5. The data processing system of claim 1 , wherein the snoop circuitry, in response to the cache processing a debug snoop request from the snoop request queue, provides a corresponding debug snoop response to the debug control circuitry and, in response to the cache processing a non-debug snoop request from the snoop request queue, provides a corresponding non-debug snoop response to the system interconnect.

6. The data processing system of claim 1 , wherein the trigger control logic provides a second trigger signal to indicate when a debug snoop request at a head of the snoop request queue is to be provided to the cache for processing.

7. The data processing system of claim 1 , wherein the trigger control logic provides the first trigger signal in response to occurrence of a specified debug event.

8. The data processing system of claim 1 , further comprising:

trigger control logic which provides a first trigger signal to indicate when a debug snoop request is to be provided from the debug control circuitry for storage into the snoop request queue.

9. In a data processing system, a method comprising:

receiving a debug snoop request in response to a debug snoop command from a debugger;

storing the debug snoop request into a first entry of a snoop request queue and setting a first debug indicator corresponding to the first entry to a first value;

receiving a non-debug snoop request in response to a transaction snooped from a system interconnect;

storing the non-debug snoop request into a second entry of the snoop request queue and setting a second debug indicator corresponding to the second entry to a second value, wherein the first value is different from the second value, and wherein the first value indicates a debug type snoop request and the second value indicates a non-debug type snoop request;

providing the debug snoop request to a cache for processing when the debug snoop request is at a head of the snoop request queue; and

providing the non-debug snoop request to the cache for processing when the non-debug snoop request is at the head of the snoop request queue.

10. The method of claim 9 , wherein the receiving the debug snoop request in response to the debug snoop command from the debugger is performed without use of the system interconnect.

11. The method of claim 9 , further comprising:

asserting a trigger signal in response to occurrence of a specified debug event, wherein the providing the debug snoop request to the cache for processing when the debug snoop request is at the head of the snoop request queue is performed such that debug snoop request is provided to the cache for processing when the debug snoop request is at the head of the snoop request queue and the trigger signal is asserted.

12. The method of claim 9 , further comprising:

providing a debug snoop status corresponding to the debug snoop request after the debug snoop request has been processed by the cache; and

providing a non-debug snoop status corresponding to the non-debug snoop request after the non-debug snoop request has been processed by the cache.

13. The method of claim 12 , wherein the providing the debug snoop status comprises using the first debug indicator to route the debug snoop status to the debugger, and wherein the providing the non-debug snoop status comprises using the second debug indicator to route the non-debug snoop status to the system interconnect.

14. The method of claim 9 , further comprising:

prior to the storing the debug snoop request into the first entry of the snoop request queue, buffering the debug snoop request and buffering at least one additional debug snoop request,

wherein the storing the debug snoop request into the first entry of the snoop request queue is performed in response to a number of currently buffered debug snoop requests reaching a threshold value.

15. The method of claim 9 , further comprising:

asserting a trigger signal in response to occurrence of a specified debug event, wherein the storing the debug snoop request into the first entry of the snoop request queue is performed in response to the asserting the trigger signal.

16. A data processing system comprising:

snoop circuitry having a snoop request queue, wherein the snoop request queue comprises:

a plurality of entries, each of the plurality of entries for storing a snoop request, wherein each snoop request can either be a debug snoop request or a non-debug snoop request, and

a debug indicator, for each request stored the snoop request queue, which indicates whether the request is a non-debug snoop request or a debug snoop request,

wherein the snoop circuitry receives non-debug snoop requests for storage into the snoop request queue in response to transactions snooped from a system interconnect and receives debug snoop requests from debug circuitry for storage into the snoop request queue in response to debug snoop commands; and

a cache which receives non-debug snoop requests and debug snoop requests from the snoop request queue for processing.

17. The data processing system of claim 16 , wherein the snoop circuitry, in response to the cache processing a snoop request from the snoop request queue to form a processed snoop request, uses the debug indicator corresponding to the processed snoop request to route a snoop response corresponding to the processed snoop request to either the debug circuitry or the system interconnect based on whether the processed snoop request is either a debug snoop request or a non-debug snoop request, respectively.

18. The data processing system of claim 16 , further comprising:

trigger control logic which provides a first trigger signal in response to occurrence of a specified debug event to indicate when a debug snoop request is to be provided from the debug circuitry for storage into the snoop request queue.

Assignments (18)