IP Library Granted Patent US 7,994,630
Granted Patent B2
US 7,994,630 · App. 12/367,719 · Granted Aug 9, 2011

Power transistor package with integrated bus bar

Assignee: Infineon Technologies AG
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Quick Facts
Patent No.
US 7,994,630
App. No.
12/367,719
Granted
Aug 9, 2011
Kind
B2
Abstract

According to one embodiment, a power transistor package includes an electrically conductive flange configured to be connected to a source of a power transistor device. The package further includes a first terminal mechanically fastened to the flange and configured to be electrically connected to a gate of the power transistor device and a second terminal mechanically fastened to the flange and configured to be electrically connected to a drain of the power transistor device. The package also includes a bus bar mechanically fastened to the flange which extends between and connects at least two different DC bias terminals mechanically fastened to the flange. The bus bar is configured to be electrically connected to the drain via one or more RF grounded connections.

Claims (33)

1. A power transistor module, comprising:

a power transistor device having a source, a drain and a gate; and

a package comprising:

an electrically conductive flange connected to the source;

a first terminal mechanically fastened to the flange and electrically connected to the gate;

a second terminal mechanically fastened to the flange and electrically connected to the drain; and

a bus bar mechanically fastened to the flange which extends between and connects at least two different DC bias terminals mechanically fastened to the flange, the bus bar being electrically connected to the drain via one or more RF grounded connections.

2. The power transistor module according to claim 1 , wherein the bus bar comprises a generally flat strip of metallization.

3. The power transistor module according to claim 1 , wherein the one or more RF grounded connections comprises a first plurality of bond wires connecting the bus bar to a capacitor and a second plurality of bond wires connecting the capacitor to the drain.

4. The power transistor module according to claim 3 , wherein the second plurality of bond wires comprises a plurality of tuning wires sized so that a drain-to-source capacitance of the power transistor device resonates slightly below a desired band of operation.

5. The power transistor module according to claim 3 , wherein the first and second plurality of bond wires form a low inductance feed path between the bus bar and the drain operable to provide low frequency termination at frequencies ranging from about 0-100 MHz.

6. The power transistor module according to claim 3 , wherein the bus bar and the first and second plurality of bond wires form an integrated DC feed path which provides balanced termination points across substantially all of the drain.

7. The power transistor module according to claim 1 , wherein the bus bar extends between and connects the DC bias terminals over at least a length of the power transistor device.

8. The power transistor module according to claim 1 , wherein the power transistor device is configured to operate at a power level of 300 W or greater.

9. A power transistor package, comprising:

an electrically conductive flange configured to be connected to a source of a power transistor device;

a first terminal mechanically fastened to the flange and configured to be electrically connected to a gate of the power transistor device;

a second terminal mechanically fastened to the flange and configured to be electrically connected to a drain of the power transistor device; and

a bus bar mechanically fastened to the flange which extends between and connects at least two different DC bias terminals mechanically fastened to the flange, the bus bar being configured to be electrically connected to the drain via one or more RF grounded connections.

10. The power transistor package according to claim 9 , wherein the first and second terminals, the bus bar and the DC bias terminals are mechanically fastened to an insulative member disposed on the flange.

11. The power transistor package according to claim 9 , wherein the bus bar comprises a generally flat strip of metallization.

12. A power transistor module, comprising:

at least two different power transistor devices each having a source, a drain and a gate; and

a package comprising:

an electrically conductive flange connected to the source of each power transistor device;

a first terminal mechanically fastened to the flange and electrically connected to the gate of each power transistor device;

a second terminal mechanically fastened to the flange and electrically connected to the drain of each power transistor device; and

a bus bar mechanically fastened to the flange which extends between and connects at least two different DC bias terminals mechanically fastened to the flange, the bus bar being electrically connected to the drain of each power transistor device via one or more RF grounded connections.

13. The power transistor module according to claim 12 , wherein the one or more RF grounded connections comprises a first plurality of bond wires connecting the bus bar to at least one capacitor and a second plurality of bond wires connecting the at least one capacitor to the drain of each power transistor device.

14. The power transistor module according to claim 12 , wherein the bus bar extends between and connects the DC bias terminals over at least a combined length of all of the power transistor devices.

15. The power transistor module according to claim 13 , wherein the second plurality of bond wires comprises a plurality of tuning wires sized so that a drain-to-source capacitance of each power transistor device resonates slightly below a desired band of operation.

16. The power transistor module according to claim 13 , wherein the first and second plurality of bond wires form a low inductance feed path between the bus bar and the drain of each power transistor device, the low inductance feed path being operable to provide low frequency termination at frequencies ranging from about 0-100 MHz.

17. The power transistor module according to claim 13 , wherein the bus bar and the first and second plurality of bond wires form an integrated DC feed path which provides balanced termination points across substantially all of each drain.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 12, 2009
From: INFINEON TECHNOLOGIES NORTH AMERICA CORP.
To: INFINEON TECHNOLOGIES AG
Reel/Frame 022386/0023 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 17, 2009
From: BLAIR, CYNTHIA; FOWLKES, DONALD
To: INFINEON TECHNOLOGIES NORTH AMERICA CORP.
Reel/Frame 022265/0505 →
Continuity (1)
Related Publication 20100200979A1 · Aug 12, 2010