IP Library Granted Patent US 7,859,049
Granted Patent B2
US 7,859,049 · App. 12/392,491 · Granted Dec 28, 2010

Semiconductor device

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Quick Facts
Patent No.
US 7,859,049
App. No.
12/392,491
Granted
Dec 28, 2010
Kind
B2
Abstract

Provided is a semiconductor device. A well region ( 2 ) formed on a semiconductor substrate ( 1 ) includes a plurality of trench regions ( 12 ), and a source electrode ( 10 ) is connected to a source region ( 6 ) formed on a substrate surface between the trench regions ( 12 ). Adjacently to the source region ( 6 ), a high concentration region ( 11 ) is formed, which is brought into butting contact with the source electrode ( 10 ) together with the source region ( 6 ), whereby a substrate potential is fixed. A drain region ( 5 ) is formed at a bottom portion of the trench region ( 12 ), whose potential is taken to the substrate surface by a drain electrode ( 9 ) buried inside the trench region ( 12 ). An arbitrary voltage is applied to a gate electrode ( 4 a, 4 b ), and the drain electrode ( 9 ), whereby carriers flow from the source region ( 6 ) to the drain region ( 5 ) and the semiconductor device is in an on-state.

Claims (17)

1. A semiconductor device, comprising:

a first conductivity type well region disposed on a surface of a semiconductor substrate at a predetermined depth;

a plurality of trench regions disposed at a depth smaller than the predetermined depth of the first conductivity type well region;

a gate electrode disposed on a side surface of each of the plurality of trench regions via a gate insulating film and brought into contact with the gate insulating film;

a second conductivity type drain region disposed at a part of a bottom of each of the plurality of trench regions, wherein a width of the drain region is less than a width of the trench region and lateral sides of the drain region are apart from corresponding sides of the trench region by at least a thickness of the gate insulating film;

a second conductivity type source region disposed in a region formed between the plurality of trench regions, and disposed on the surface of the semiconductor substrate along the gate insulating film; and

a first conductivity type high concentration region disposed in a region formed between the plurality of trench regions, and disposed on the surface of the semiconductor substrate to be brought into contact with the second conductivity type source region.

2. A semiconductor device according to claim 1 , further comprising a second conductivity type low concentration diffusion region formed between the semiconductor substrate and the first conductivity type well region to surround the second conductivity type drain region.

3. A semiconductor device, comprising:

a first conductivity type well region disposed on a surface of a semiconductor substrate at a predetermined depth;

a plurality of trench regions disposed at a depth smaller than the predetermined depth of the first conductivity type well region;

a gate electrode disposed on a side surface of each of the plurality of trench regions via a gate insulating film and brought into contact with the gate insulating film;

a second conductivity type drain region disposed in a bottom portion of each of the plurality of trench regions;

a second conductivity type source region disposed in a region formed between the plurality of trench regions, and disposed on the surface of the semiconductor substrate along the gate insulating film;

a first conductivity type high concentration region disposed in a region formed between the plurality of trench regions, and disposed on the surface of the semiconductor substrate to be brought into contact with the second conductivity type source region; and

a second conductivity type low concentration diffusion region formed between the semiconductor substrate and a bottom surface of the first conductivity type well region.

4. A semiconductor device according to claim 3 , wherein the second conductivity type low concentration diffusion region surrounds the second conductivity type drain region.

Assignments (4)
CHANGE OF NAME Recorded Mar 12, 2018
From: SII SEMICONDUCTOR CORPORATION
To: ABLIC INC.
Reel/Frame 045567/0927 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE PREVIOUSLY RECORDED AT REEL: 037783 FRAME: 0166. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Feb 23, 2016
From: SEIKO INSTRUMENTS INC
To: SII SEMICONDUCTOR CORPORATION
Reel/Frame 037903/0928 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 11, 2016
From: SEIKO INSTRUMENTS INC
To: SII SEMICONDUCTOR CORPORATION .
Reel/Frame 037783/0166 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 7, 2009
From: RISAKI, TOMOMITSU
To: SEIKO INSTRUMENTS INC.
Reel/Frame 022515/0510 →