Semiconductor device

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Quick Facts

Patent No.: US 7,863,927
App. No.: 12/392,517
Granted: Jan 4, 2011
Kind: B2

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Abstract

The present invention is directed to adjust a resistance value of an output buffer on the basis of a resistance value of an external resistor. A potential according to a resistance ratio between an external resistor and each of resistance adjusters is detected by a code generator. In the code generator, code signals for adjusting resistance are adjusted in accordance with the detection result. The resistance value of each of the resistance adjusters is adjusted to an external resistor. Further, by code signals with which the resistance value of each of the resistance adjusters is adjusted to the resistance value of the external resistor, the resistance of the resistance value of an output buffer is adjusted.

Claims (60)

1. A semiconductor device comprising:

a pad for coupling an external resistor;

a first first-type resistance adjuster whose resistance value is adjusted according to a first code signal;

a second first-type resistance adjuster whose resistance value is adjusted according to the first code signal;

a third first-type resistance adjuster whose resistance value is adjusted according to a first correction code signal;

a first second-type resistance adjuster whose resistance value is adjusted according to a second code signal;

a second second-type resistance adjuster whose resistance value is adjusted according to the second code signal; and

a resistance value of the external resistor is between a first resistance value of the first first-type resistance adjuster when adjusted the resistance value according to the first code signal and a second resistance value of the first first-type resistance adjuster when adjusted the resistance value according to the first correction code signal.

2. The semiconductor device according to claim 1 , wherein in the first-type resistance adjuster, a plurality of resistance adjustment elements in each of which a P-channel-type MOS transistor and a resistive element are coupled in series are coupled in parallel, the P-channel-type MOS transistor is on/off controlled in accordance with the corresponding code signal, and a resistance value is adjusted, and

wherein in the second-type resistance adjuster, a plurality of resistance adjustment elements in each of which an N-channel-type MOS transistor and a resistive element are coupled in series are coupled in parallel, the N-channel-type MOS transistor is on/off controlled in accordance with the corresponding code signal, and a resistance value is adjusted.

3. The semiconductor device according to claim 1

further comprising an output driver whose resistance value is adjusted according to each of code signals adjusted in the code generator.

4. The semiconductor device according to claim 1 ,

wherein each resistance adjuster includes parallel switches configured to open or close in accordance with the corresponding code signal.

5. A semiconductor device comprising:

a pad for coupling an external resistor;

a first first-type resistance adjuster whose resistance value is adjusted according to a first code signal;

a second first-type resistance adjuster whose resistance value is adjusted according to the first code signal;

a third first-type resistance adjuster whose resistance value is adjusted according to the first code signal;

a fourth first-type resistance adjuster whose resistance value is adjusted according to the first code signal;

a first second-type resistance adjuster whose resistance value is adjusted according to a second code signal;

a second second-type resistance adjuster whose resistance value is adjusted according to a third code signal;

a third second-type resistance adjuster whose resistance value is adjusted according to the third code signal;

a fifth first-type resistance adjuster whose resistance value is adjusted according to a fourth code signal; and

a code generator for comparing potential of a first node determined by a resistance ratio between the external resistor and the first first-type resistance adjuster with a reference potential, adjusting the first code signal according to a comparison result, comparing potential of a second node determined by a resistance ratio between the second first-type resistance adjuster and the first second-type resistance adjuster with reference potential, adjusting a second code signal according to a comparison result, comparing a potential of a third node determined by a resistance ratio between a combined resistance between the third first-type resistance adjuster and the fourth first-type resistance adjuster and the second second-type resistance adjuster with reference potential, adjusting a third code signal according to a comparison result, comparing potential of a fourth node determined by a resistance ratio between the fifth first-type resistance adjuster and the fourth second-type resistance adjuster with reference potential, and adjusting a fourth code signal according to a comparison result.

6. A semiconductor device comprising:

a pad for coupling an external resistor;

a first first-type resistance adjuster whose resistance value is adjusted according to a first code signal;

a second first-type resistance adjuster whose resistance value is adjusted according to the first code signal;

a third first-type resistance adjuster whose resistance value is adjusted according to the first code signal;

a fourth first-type resistance adjuster whose resistance value is adjusted according to a first correction code signal;

a first second-type resistance adjuster whose resistance value is adjusted according to a second code signal;

a second second-type resistance adjuster whose resistance value is adjusted according to the second code signal;

a third second-type resistance adjuster whose resistance value is adjusted according to a third code signal;

a fourth second-type resistance adjuster whose resistance value is adjusted according to a second correction code signal;

a fifth first-type resistance adjuster whose resistance value is adjusted according to a fourth code signal; and

a code generator for comparing potential of a first node determined by a resistance ratio between the external resistor and the first first-type resistance adjuster with a reference potential, adjusting the first code signal according to a comparison result, adjusting the first correction code based on the first code signal, comparing potential of a second node determined by a resistance ratio between the second first-type resistance adjuster and the first second-type resistance adjuster with reference potential, adjusting a second code signal according to a comparison result, adjusting the second correction code based on the second code signal, comparing a potential of a third node determined by a resistance ratio between a combined resistance between the third first-type resistance adjuster and the fourth first-type resistance adjuster and the third second-type resistance adjuster with reference potential, adjusting the third code signal according to a comparison result, comparing potential of a fourth node determined by a resistance ratio between the fifth first-type resistance adjuster and combined resistance between the second second-type resistance adjuster and the fourth second-type resistance adjuster with reference potential, and adjusting the fourth code signal according to a comparison result.

7. A semiconductor device comprising: